x86

package standard library
Version: go1.16.6 Latest Latest
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Published: Jul 12, 2021 License: BSD-3-Clause Imports: 10 Imported by: 0

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Index

Constants

View Source
const (
	REG_AL = obj.RBaseAMD64 + iota
	REG_CL
	REG_DL
	REG_BL
	REG_SPB
	REG_BPB
	REG_SIB
	REG_DIB
	REG_R8B
	REG_R9B
	REG_R10B
	REG_R11B
	REG_R12B
	REG_R13B
	REG_R14B
	REG_R15B

	REG_AX
	REG_CX
	REG_DX
	REG_BX
	REG_SP
	REG_BP
	REG_SI
	REG_DI
	REG_R8
	REG_R9
	REG_R10
	REG_R11
	REG_R12
	REG_R13
	REG_R14
	REG_R15

	REG_AH
	REG_CH
	REG_DH
	REG_BH

	REG_F0
	REG_F1
	REG_F2
	REG_F3
	REG_F4
	REG_F5
	REG_F6
	REG_F7

	REG_M0
	REG_M1
	REG_M2
	REG_M3
	REG_M4
	REG_M5
	REG_M6
	REG_M7

	REG_K0
	REG_K1
	REG_K2
	REG_K3
	REG_K4
	REG_K5
	REG_K6
	REG_K7

	REG_X0
	REG_X1
	REG_X2
	REG_X3
	REG_X4
	REG_X5
	REG_X6
	REG_X7
	REG_X8
	REG_X9
	REG_X10
	REG_X11
	REG_X12
	REG_X13
	REG_X14
	REG_X15
	REG_X16
	REG_X17
	REG_X18
	REG_X19
	REG_X20
	REG_X21
	REG_X22
	REG_X23
	REG_X24
	REG_X25
	REG_X26
	REG_X27
	REG_X28
	REG_X29
	REG_X30
	REG_X31

	REG_Y0
	REG_Y1
	REG_Y2
	REG_Y3
	REG_Y4
	REG_Y5
	REG_Y6
	REG_Y7
	REG_Y8
	REG_Y9
	REG_Y10
	REG_Y11
	REG_Y12
	REG_Y13
	REG_Y14
	REG_Y15
	REG_Y16
	REG_Y17
	REG_Y18
	REG_Y19
	REG_Y20
	REG_Y21
	REG_Y22
	REG_Y23
	REG_Y24
	REG_Y25
	REG_Y26
	REG_Y27
	REG_Y28
	REG_Y29
	REG_Y30
	REG_Y31

	REG_Z0
	REG_Z1
	REG_Z2
	REG_Z3
	REG_Z4
	REG_Z5
	REG_Z6
	REG_Z7
	REG_Z8
	REG_Z9
	REG_Z10
	REG_Z11
	REG_Z12
	REG_Z13
	REG_Z14
	REG_Z15
	REG_Z16
	REG_Z17
	REG_Z18
	REG_Z19
	REG_Z20
	REG_Z21
	REG_Z22
	REG_Z23
	REG_Z24
	REG_Z25
	REG_Z26
	REG_Z27
	REG_Z28
	REG_Z29
	REG_Z30
	REG_Z31

	REG_CS
	REG_SS
	REG_DS
	REG_ES
	REG_FS
	REG_GS

	REG_GDTR // global descriptor table register
	REG_IDTR // interrupt descriptor table register
	REG_LDTR // local descriptor table register
	REG_MSW  // machine status word
	REG_TASK // task register

	REG_CR0
	REG_CR1
	REG_CR2
	REG_CR3
	REG_CR4
	REG_CR5
	REG_CR6
	REG_CR7
	REG_CR8
	REG_CR9
	REG_CR10
	REG_CR11
	REG_CR12
	REG_CR13
	REG_CR14
	REG_CR15

	REG_DR0
	REG_DR1
	REG_DR2
	REG_DR3
	REG_DR4
	REG_DR5
	REG_DR6
	REG_DR7

	REG_TR0
	REG_TR1
	REG_TR2
	REG_TR3
	REG_TR4
	REG_TR5
	REG_TR6
	REG_TR7

	REG_TLS

	MAXREG

	REG_CR = REG_CR0
	REG_DR = REG_DR0
	REG_TR = REG_TR0

	REGARG   = -1
	REGRET   = REG_AX
	FREGRET  = REG_X0
	REGSP    = REG_SP
	REGCTXT  = REG_DX
	REGEXT   = REG_R15     // compiler allocates external registers R15 down
	FREGMIN  = REG_X0 + 5  // first register variable
	FREGEXT  = REG_X0 + 15 // first external register
	T_TYPE   = 1 << 0
	T_INDEX  = 1 << 1
	T_OFFSET = 1 << 2
	T_FCONST = 1 << 3
	T_SYM    = 1 << 4
	T_SCONST = 1 << 5
	T_64     = 1 << 6
	T_GOTYPE = 1 << 7
)
View Source
const (
	AAAA = obj.ABaseAMD64 + obj.A_ARCHSPECIFIC + iota
	AAAD
	AAAM
	AAAS
	AADCB
	AADCL
	AADCQ
	AADCW
	AADCXL
	AADCXQ
	AADDB
	AADDL
	AADDPD
	AADDPS
	AADDQ
	AADDSD
	AADDSS
	AADDSUBPD
	AADDSUBPS
	AADDW
	AADJSP
	AADOXL
	AADOXQ
	AAESDEC
	AAESDECLAST
	AAESENC
	AAESENCLAST
	AAESIMC
	AAESKEYGENASSIST
	AANDB
	AANDL
	AANDNL
	AANDNPD
	AANDNPS
	AANDNQ
	AANDPD
	AANDPS
	AANDQ
	AANDW
	AARPL
	ABEXTRL
	ABEXTRQ
	ABLENDPD
	ABLENDPS
	ABLENDVPD
	ABLENDVPS
	ABLSIL
	ABLSIQ
	ABLSMSKL
	ABLSMSKQ
	ABLSRL
	ABLSRQ
	ABOUNDL
	ABOUNDW
	ABSFL
	ABSFQ
	ABSFW
	ABSRL
	ABSRQ
	ABSRW
	ABSWAPL
	ABSWAPQ
	ABTCL
	ABTCQ
	ABTCW
	ABTL
	ABTQ
	ABTRL
	ABTRQ
	ABTRW
	ABTSL
	ABTSQ
	ABTSW
	ABTW
	ABYTE
	ABZHIL
	ABZHIQ
	ACBW
	ACDQ
	ACDQE
	ACLAC
	ACLC
	ACLD
	ACLDEMOTE
	ACLFLUSH
	ACLFLUSHOPT
	ACLI
	ACLTS
	ACLWB
	ACMC
	ACMOVLCC
	ACMOVLCS
	ACMOVLEQ
	ACMOVLGE
	ACMOVLGT
	ACMOVLHI
	ACMOVLLE
	ACMOVLLS
	ACMOVLLT
	ACMOVLMI
	ACMOVLNE
	ACMOVLOC
	ACMOVLOS
	ACMOVLPC
	ACMOVLPL
	ACMOVLPS
	ACMOVQCC
	ACMOVQCS
	ACMOVQEQ
	ACMOVQGE
	ACMOVQGT
	ACMOVQHI
	ACMOVQLE
	ACMOVQLS
	ACMOVQLT
	ACMOVQMI
	ACMOVQNE
	ACMOVQOC
	ACMOVQOS
	ACMOVQPC
	ACMOVQPL
	ACMOVQPS
	ACMOVWCC
	ACMOVWCS
	ACMOVWEQ
	ACMOVWGE
	ACMOVWGT
	ACMOVWHI
	ACMOVWLE
	ACMOVWLS
	ACMOVWLT
	ACMOVWMI
	ACMOVWNE
	ACMOVWOC
	ACMOVWOS
	ACMOVWPC
	ACMOVWPL
	ACMOVWPS
	ACMPB
	ACMPL
	ACMPPD
	ACMPPS
	ACMPQ
	ACMPSB
	ACMPSD
	ACMPSL
	ACMPSQ
	ACMPSS
	ACMPSW
	ACMPW
	ACMPXCHG16B
	ACMPXCHG8B
	ACMPXCHGB
	ACMPXCHGL
	ACMPXCHGQ
	ACMPXCHGW
	ACOMISD
	ACOMISS
	ACPUID
	ACQO
	ACRC32B
	ACRC32L
	ACRC32Q
	ACRC32W
	ACVTPD2PL
	ACVTPD2PS
	ACVTPL2PD
	ACVTPL2PS
	ACVTPS2PD
	ACVTPS2PL
	ACVTSD2SL
	ACVTSD2SQ
	ACVTSD2SS
	ACVTSL2SD
	ACVTSL2SS
	ACVTSQ2SD
	ACVTSQ2SS
	ACVTSS2SD
	ACVTSS2SL
	ACVTSS2SQ
	ACVTTPD2PL
	ACVTTPS2PL
	ACVTTSD2SL
	ACVTTSD2SQ
	ACVTTSS2SL
	ACVTTSS2SQ
	ACWD
	ACWDE
	ADAA
	ADAS
	ADECB
	ADECL
	ADECQ
	ADECW
	ADIVB
	ADIVL
	ADIVPD
	ADIVPS
	ADIVQ
	ADIVSD
	ADIVSS
	ADIVW
	ADPPD
	ADPPS
	AEMMS
	AENTER
	AEXTRACTPS
	AF2XM1
	AFABS
	AFADDD
	AFADDDP
	AFADDF
	AFADDL
	AFADDW
	AFBLD
	AFBSTP
	AFCHS
	AFCLEX
	AFCMOVB
	AFCMOVBE
	AFCMOVCC
	AFCMOVCS
	AFCMOVE
	AFCMOVEQ
	AFCMOVHI
	AFCMOVLS
	AFCMOVNB
	AFCMOVNBE
	AFCMOVNE
	AFCMOVNU
	AFCMOVU
	AFCMOVUN
	AFCOMD
	AFCOMDP
	AFCOMDPP
	AFCOMF
	AFCOMFP
	AFCOMI
	AFCOMIP
	AFCOML
	AFCOMLP
	AFCOMW
	AFCOMWP
	AFCOS
	AFDECSTP
	AFDIVD
	AFDIVDP
	AFDIVF
	AFDIVL
	AFDIVRD
	AFDIVRDP
	AFDIVRF
	AFDIVRL
	AFDIVRW
	AFDIVW
	AFFREE
	AFINCSTP
	AFINIT
	AFLD1
	AFLDCW
	AFLDENV
	AFLDL2E
	AFLDL2T
	AFLDLG2
	AFLDLN2
	AFLDPI
	AFLDZ
	AFMOVB
	AFMOVBP
	AFMOVD
	AFMOVDP
	AFMOVF
	AFMOVFP
	AFMOVL
	AFMOVLP
	AFMOVV
	AFMOVVP
	AFMOVW
	AFMOVWP
	AFMOVX
	AFMOVXP
	AFMULD
	AFMULDP
	AFMULF
	AFMULL
	AFMULW
	AFNOP
	AFPATAN
	AFPREM
	AFPREM1
	AFPTAN
	AFRNDINT
	AFRSTOR
	AFSAVE
	AFSCALE
	AFSIN
	AFSINCOS
	AFSQRT
	AFSTCW
	AFSTENV
	AFSTSW
	AFSUBD
	AFSUBDP
	AFSUBF
	AFSUBL
	AFSUBRD
	AFSUBRDP
	AFSUBRF
	AFSUBRL
	AFSUBRW
	AFSUBW
	AFTST
	AFUCOM
	AFUCOMI
	AFUCOMIP
	AFUCOMP
	AFUCOMPP
	AFXAM
	AFXCHD
	AFXRSTOR
	AFXRSTOR64
	AFXSAVE
	AFXSAVE64
	AFXTRACT
	AFYL2X
	AFYL2XP1
	AHADDPD
	AHADDPS
	AHLT
	AHSUBPD
	AHSUBPS
	AICEBP
	AIDIVB
	AIDIVL
	AIDIVQ
	AIDIVW
	AIMUL3L
	AIMUL3Q
	AIMUL3W
	AIMULB
	AIMULL
	AIMULQ
	AIMULW
	AINB
	AINCB
	AINCL
	AINCQ
	AINCW
	AINL
	AINSB
	AINSERTPS
	AINSL
	AINSW
	AINT
	AINTO
	AINVD
	AINVLPG
	AINVPCID
	AINW
	AIRETL
	AIRETQ
	AIRETW
	AJCC // >= unsigned
	AJCS // < unsigned
	AJCXZL
	AJCXZQ
	AJCXZW
	AJEQ // == (zero)
	AJGE // >= signed
	AJGT // > signed
	AJHI // > unsigned
	AJLE // <= signed
	AJLS // <= unsigned
	AJLT // < signed
	AJMI // sign bit set (negative)
	AJNE // != (nonzero)
	AJOC // overflow clear
	AJOS // overflow set
	AJPC // parity clear
	AJPL // sign bit clear (positive)
	AJPS // parity set
	AKADDB
	AKADDD
	AKADDQ
	AKADDW
	AKANDB
	AKANDD
	AKANDNB
	AKANDND
	AKANDNQ
	AKANDNW
	AKANDQ
	AKANDW
	AKMOVB
	AKMOVD
	AKMOVQ
	AKMOVW
	AKNOTB
	AKNOTD
	AKNOTQ
	AKNOTW
	AKORB
	AKORD
	AKORQ
	AKORTESTB
	AKORTESTD
	AKORTESTQ
	AKORTESTW
	AKORW
	AKSHIFTLB
	AKSHIFTLD
	AKSHIFTLQ
	AKSHIFTLW
	AKSHIFTRB
	AKSHIFTRD
	AKSHIFTRQ
	AKSHIFTRW
	AKTESTB
	AKTESTD
	AKTESTQ
	AKTESTW
	AKUNPCKBW
	AKUNPCKDQ
	AKUNPCKWD
	AKXNORB
	AKXNORD
	AKXNORQ
	AKXNORW
	AKXORB
	AKXORD
	AKXORQ
	AKXORW
	ALAHF
	ALARL
	ALARQ
	ALARW
	ALDDQU
	ALDMXCSR
	ALEAL
	ALEAQ
	ALEAVEL
	ALEAVEQ
	ALEAVEW
	ALEAW
	ALFENCE
	ALFSL
	ALFSQ
	ALFSW
	ALGDT
	ALGSL
	ALGSQ
	ALGSW
	ALIDT
	ALLDT
	ALMSW
	ALOCK
	ALODSB
	ALODSL
	ALODSQ
	ALODSW
	ALONG
	ALOOP
	ALOOPEQ
	ALOOPNE
	ALSLL
	ALSLQ
	ALSLW
	ALSSL
	ALSSQ
	ALSSW
	ALTR
	ALZCNTL
	ALZCNTQ
	ALZCNTW
	AMASKMOVOU
	AMASKMOVQ
	AMAXPD
	AMAXPS
	AMAXSD
	AMAXSS
	AMFENCE
	AMINPD
	AMINPS
	AMINSD
	AMINSS
	AMONITOR
	AMOVAPD
	AMOVAPS
	AMOVB
	AMOVBELL
	AMOVBEQQ
	AMOVBEWW
	AMOVBLSX
	AMOVBLZX
	AMOVBQSX
	AMOVBQZX
	AMOVBWSX
	AMOVBWZX
	AMOVDDUP
	AMOVHLPS
	AMOVHPD
	AMOVHPS
	AMOVL
	AMOVLHPS
	AMOVLPD
	AMOVLPS
	AMOVLQSX
	AMOVLQZX
	AMOVMSKPD
	AMOVMSKPS
	AMOVNTDQA
	AMOVNTIL
	AMOVNTIQ
	AMOVNTO
	AMOVNTPD
	AMOVNTPS
	AMOVNTQ
	AMOVO
	AMOVOU
	AMOVQ
	AMOVQL
	AMOVQOZX
	AMOVSB
	AMOVSD
	AMOVSHDUP
	AMOVSL
	AMOVSLDUP
	AMOVSQ
	AMOVSS
	AMOVSW
	AMOVSWW
	AMOVUPD
	AMOVUPS
	AMOVW
	AMOVWLSX
	AMOVWLZX
	AMOVWQSX
	AMOVWQZX
	AMOVZWW
	AMPSADBW
	AMULB
	AMULL
	AMULPD
	AMULPS
	AMULQ
	AMULSD
	AMULSS
	AMULW
	AMULXL
	AMULXQ
	AMWAIT
	ANEGB
	ANEGL
	ANEGQ
	ANEGW
	ANOPL
	ANOPW
	ANOTB
	ANOTL
	ANOTQ
	ANOTW
	AORB
	AORL
	AORPD
	AORPS
	AORQ
	AORW
	AOUTB
	AOUTL
	AOUTSB
	AOUTSL
	AOUTSW
	AOUTW
	APABSB
	APABSD
	APABSW
	APACKSSLW
	APACKSSWB
	APACKUSDW
	APACKUSWB
	APADDB
	APADDL
	APADDQ
	APADDSB
	APADDSW
	APADDUSB
	APADDUSW
	APADDW
	APALIGNR
	APAND
	APANDN
	APAUSE
	APAVGB
	APAVGW
	APBLENDVB
	APBLENDW
	APCLMULQDQ
	APCMPEQB
	APCMPEQL
	APCMPEQQ
	APCMPEQW
	APCMPESTRI
	APCMPESTRM
	APCMPGTB
	APCMPGTL
	APCMPGTQ
	APCMPGTW
	APCMPISTRI
	APCMPISTRM
	APDEPL
	APDEPQ
	APEXTL
	APEXTQ
	APEXTRB
	APEXTRD
	APEXTRQ
	APEXTRW
	APHADDD
	APHADDSW
	APHADDW
	APHMINPOSUW
	APHSUBD
	APHSUBSW
	APHSUBW
	APINSRB
	APINSRD
	APINSRQ
	APINSRW
	APMADDUBSW
	APMADDWL
	APMAXSB
	APMAXSD
	APMAXSW
	APMAXUB
	APMAXUD
	APMAXUW
	APMINSB
	APMINSD
	APMINSW
	APMINUB
	APMINUD
	APMINUW
	APMOVMSKB
	APMOVSXBD
	APMOVSXBQ
	APMOVSXBW
	APMOVSXDQ
	APMOVSXWD
	APMOVSXWQ
	APMOVZXBD
	APMOVZXBQ
	APMOVZXBW
	APMOVZXDQ
	APMOVZXWD
	APMOVZXWQ
	APMULDQ
	APMULHRSW
	APMULHUW
	APMULHW
	APMULLD
	APMULLW
	APMULULQ
	APOPAL
	APOPAW
	APOPCNTL
	APOPCNTQ
	APOPCNTW
	APOPFL
	APOPFQ
	APOPFW
	APOPL
	APOPQ
	APOPW
	APOR
	APREFETCHNTA
	APREFETCHT0
	APREFETCHT1
	APREFETCHT2
	APSADBW
	APSHUFB
	APSHUFD
	APSHUFHW
	APSHUFL
	APSHUFLW
	APSHUFW
	APSIGNB
	APSIGND
	APSIGNW
	APSLLL
	APSLLO
	APSLLQ
	APSLLW
	APSRAL
	APSRAW
	APSRLL
	APSRLO
	APSRLQ
	APSRLW
	APSUBB
	APSUBL
	APSUBQ
	APSUBSB
	APSUBSW
	APSUBUSB
	APSUBUSW
	APSUBW
	APTEST
	APUNPCKHBW
	APUNPCKHLQ
	APUNPCKHQDQ
	APUNPCKHWL
	APUNPCKLBW
	APUNPCKLLQ
	APUNPCKLQDQ
	APUNPCKLWL
	APUSHAL
	APUSHAW
	APUSHFL
	APUSHFQ
	APUSHFW
	APUSHL
	APUSHQ
	APUSHW
	APXOR
	AQUAD
	ARCLB
	ARCLL
	ARCLQ
	ARCLW
	ARCPPS
	ARCPSS
	ARCRB
	ARCRL
	ARCRQ
	ARCRW
	ARDFSBASEL
	ARDFSBASEQ
	ARDGSBASEL
	ARDGSBASEQ
	ARDMSR
	ARDPKRU
	ARDPMC
	ARDRANDL
	ARDRANDQ
	ARDRANDW
	ARDSEEDL
	ARDSEEDQ
	ARDSEEDW
	ARDTSC
	ARDTSCP
	AREP
	AREPN
	ARETFL
	ARETFQ
	ARETFW
	AROLB
	AROLL
	AROLQ
	AROLW
	ARORB
	ARORL
	ARORQ
	ARORW
	ARORXL
	ARORXQ
	AROUNDPD
	AROUNDPS
	AROUNDSD
	AROUNDSS
	ARSM
	ARSQRTPS
	ARSQRTSS
	ASAHF
	ASALB
	ASALL
	ASALQ
	ASALW
	ASARB
	ASARL
	ASARQ
	ASARW
	ASARXL
	ASARXQ
	ASBBB
	ASBBL
	ASBBQ
	ASBBW
	ASCASB
	ASCASL
	ASCASQ
	ASCASW
	ASETCC
	ASETCS
	ASETEQ
	ASETGE
	ASETGT
	ASETHI
	ASETLE
	ASETLS
	ASETLT
	ASETMI
	ASETNE
	ASETOC
	ASETOS
	ASETPC
	ASETPL
	ASETPS
	ASFENCE
	ASGDT
	ASHA1MSG1
	ASHA1MSG2
	ASHA1NEXTE
	ASHA1RNDS4
	ASHA256MSG1
	ASHA256MSG2
	ASHA256RNDS2
	ASHLB
	ASHLL
	ASHLQ
	ASHLW
	ASHLXL
	ASHLXQ
	ASHRB
	ASHRL
	ASHRQ
	ASHRW
	ASHRXL
	ASHRXQ
	ASHUFPD
	ASHUFPS
	ASIDT
	ASLDTL
	ASLDTQ
	ASLDTW
	ASMSWL
	ASMSWQ
	ASMSWW
	ASQRTPD
	ASQRTPS
	ASQRTSD
	ASQRTSS
	ASTAC
	ASTC
	ASTD
	ASTI
	ASTMXCSR
	ASTOSB
	ASTOSL
	ASTOSQ
	ASTOSW
	ASTRL
	ASTRQ
	ASTRW
	ASUBB
	ASUBL
	ASUBPD
	ASUBPS
	ASUBQ
	ASUBSD
	ASUBSS
	ASUBW
	ASWAPGS
	ASYSCALL
	ASYSENTER
	ASYSENTER64
	ASYSEXIT
	ASYSEXIT64
	ASYSRET
	ATESTB
	ATESTL
	ATESTQ
	ATESTW
	ATPAUSE
	ATZCNTL
	ATZCNTQ
	ATZCNTW
	AUCOMISD
	AUCOMISS
	AUD1
	AUD2
	AUMWAIT
	AUNPCKHPD
	AUNPCKHPS
	AUNPCKLPD
	AUNPCKLPS
	AUMONITOR
	AV4FMADDPS
	AV4FMADDSS
	AV4FNMADDPS
	AV4FNMADDSS
	AVADDPD
	AVADDPS
	AVADDSD
	AVADDSS
	AVADDSUBPD
	AVADDSUBPS
	AVAESDEC
	AVAESDECLAST
	AVAESENC
	AVAESENCLAST
	AVAESIMC
	AVAESKEYGENASSIST
	AVALIGND
	AVALIGNQ
	AVANDNPD
	AVANDNPS
	AVANDPD
	AVANDPS
	AVBLENDMPD
	AVBLENDMPS
	AVBLENDPD
	AVBLENDPS
	AVBLENDVPD
	AVBLENDVPS
	AVBROADCASTF128
	AVBROADCASTF32X2
	AVBROADCASTF32X4
	AVBROADCASTF32X8
	AVBROADCASTF64X2
	AVBROADCASTF64X4
	AVBROADCASTI128
	AVBROADCASTI32X2
	AVBROADCASTI32X4
	AVBROADCASTI32X8
	AVBROADCASTI64X2
	AVBROADCASTI64X4
	AVBROADCASTSD
	AVBROADCASTSS
	AVCMPPD
	AVCMPPS
	AVCMPSD
	AVCMPSS
	AVCOMISD
	AVCOMISS
	AVCOMPRESSPD
	AVCOMPRESSPS
	AVCVTDQ2PD
	AVCVTDQ2PS
	AVCVTPD2DQ
	AVCVTPD2DQX
	AVCVTPD2DQY
	AVCVTPD2PS
	AVCVTPD2PSX
	AVCVTPD2PSY
	AVCVTPD2QQ
	AVCVTPD2UDQ
	AVCVTPD2UDQX
	AVCVTPD2UDQY
	AVCVTPD2UQQ
	AVCVTPH2PS
	AVCVTPS2DQ
	AVCVTPS2PD
	AVCVTPS2PH
	AVCVTPS2QQ
	AVCVTPS2UDQ
	AVCVTPS2UQQ
	AVCVTQQ2PD
	AVCVTQQ2PS
	AVCVTQQ2PSX
	AVCVTQQ2PSY
	AVCVTSD2SI
	AVCVTSD2SIQ
	AVCVTSD2SS
	AVCVTSD2USI
	AVCVTSD2USIL
	AVCVTSD2USIQ
	AVCVTSI2SDL
	AVCVTSI2SDQ
	AVCVTSI2SSL
	AVCVTSI2SSQ
	AVCVTSS2SD
	AVCVTSS2SI
	AVCVTSS2SIQ
	AVCVTSS2USI
	AVCVTSS2USIL
	AVCVTSS2USIQ
	AVCVTTPD2DQ
	AVCVTTPD2DQX
	AVCVTTPD2DQY
	AVCVTTPD2QQ
	AVCVTTPD2UDQ
	AVCVTTPD2UDQX
	AVCVTTPD2UDQY
	AVCVTTPD2UQQ
	AVCVTTPS2DQ
	AVCVTTPS2QQ
	AVCVTTPS2UDQ
	AVCVTTPS2UQQ
	AVCVTTSD2SI
	AVCVTTSD2SIQ
	AVCVTTSD2USI
	AVCVTTSD2USIL
	AVCVTTSD2USIQ
	AVCVTTSS2SI
	AVCVTTSS2SIQ
	AVCVTTSS2USI
	AVCVTTSS2USIL
	AVCVTTSS2USIQ
	AVCVTUDQ2PD
	AVCVTUDQ2PS
	AVCVTUQQ2PD
	AVCVTUQQ2PS
	AVCVTUQQ2PSX
	AVCVTUQQ2PSY
	AVCVTUSI2SD
	AVCVTUSI2SDL
	AVCVTUSI2SDQ
	AVCVTUSI2SS
	AVCVTUSI2SSL
	AVCVTUSI2SSQ
	AVDBPSADBW
	AVDIVPD
	AVDIVPS
	AVDIVSD
	AVDIVSS
	AVDPPD
	AVDPPS
	AVERR
	AVERW
	AVEXP2PD
	AVEXP2PS
	AVEXPANDPD
	AVEXPANDPS
	AVEXTRACTF128
	AVEXTRACTF32X4
	AVEXTRACTF32X8
	AVEXTRACTF64X2
	AVEXTRACTF64X4
	AVEXTRACTI128
	AVEXTRACTI32X4
	AVEXTRACTI32X8
	AVEXTRACTI64X2
	AVEXTRACTI64X4
	AVEXTRACTPS
	AVFIXUPIMMPD
	AVFIXUPIMMPS
	AVFIXUPIMMSD
	AVFIXUPIMMSS
	AVFMADD132PD
	AVFMADD132PS
	AVFMADD132SD
	AVFMADD132SS
	AVFMADD213PD
	AVFMADD213PS
	AVFMADD213SD
	AVFMADD213SS
	AVFMADD231PD
	AVFMADD231PS
	AVFMADD231SD
	AVFMADD231SS
	AVFMADDSUB132PD
	AVFMADDSUB132PS
	AVFMADDSUB213PD
	AVFMADDSUB213PS
	AVFMADDSUB231PD
	AVFMADDSUB231PS
	AVFMSUB132PD
	AVFMSUB132PS
	AVFMSUB132SD
	AVFMSUB132SS
	AVFMSUB213PD
	AVFMSUB213PS
	AVFMSUB213SD
	AVFMSUB213SS
	AVFMSUB231PD
	AVFMSUB231PS
	AVFMSUB231SD
	AVFMSUB231SS
	AVFMSUBADD132PD
	AVFMSUBADD132PS
	AVFMSUBADD213PD
	AVFMSUBADD213PS
	AVFMSUBADD231PD
	AVFMSUBADD231PS
	AVFNMADD132PD
	AVFNMADD132PS
	AVFNMADD132SD
	AVFNMADD132SS
	AVFNMADD213PD
	AVFNMADD213PS
	AVFNMADD213SD
	AVFNMADD213SS
	AVFNMADD231PD
	AVFNMADD231PS
	AVFNMADD231SD
	AVFNMADD231SS
	AVFNMSUB132PD
	AVFNMSUB132PS
	AVFNMSUB132SD
	AVFNMSUB132SS
	AVFNMSUB213PD
	AVFNMSUB213PS
	AVFNMSUB213SD
	AVFNMSUB213SS
	AVFNMSUB231PD
	AVFNMSUB231PS
	AVFNMSUB231SD
	AVFNMSUB231SS
	AVFPCLASSPD
	AVFPCLASSPDX
	AVFPCLASSPDY
	AVFPCLASSPDZ
	AVFPCLASSPS
	AVFPCLASSPSX
	AVFPCLASSPSY
	AVFPCLASSPSZ
	AVFPCLASSSD
	AVFPCLASSSS
	AVGATHERDPD
	AVGATHERDPS
	AVGATHERPF0DPD
	AVGATHERPF0DPS
	AVGATHERPF0QPD
	AVGATHERPF0QPS
	AVGATHERPF1DPD
	AVGATHERPF1DPS
	AVGATHERPF1QPD
	AVGATHERPF1QPS
	AVGATHERQPD
	AVGATHERQPS
	AVGETEXPPD
	AVGETEXPPS
	AVGETEXPSD
	AVGETEXPSS
	AVGETMANTPD
	AVGETMANTPS
	AVGETMANTSD
	AVGETMANTSS
	AVGF2P8AFFINEINVQB
	AVGF2P8AFFINEQB
	AVGF2P8MULB
	AVHADDPD
	AVHADDPS
	AVHSUBPD
	AVHSUBPS
	AVINSERTF128
	AVINSERTF32X4
	AVINSERTF32X8
	AVINSERTF64X2
	AVINSERTF64X4
	AVINSERTI128
	AVINSERTI32X4
	AVINSERTI32X8
	AVINSERTI64X2
	AVINSERTI64X4
	AVINSERTPS
	AVLDDQU
	AVLDMXCSR
	AVMASKMOVDQU
	AVMASKMOVPD
	AVMASKMOVPS
	AVMAXPD
	AVMAXPS
	AVMAXSD
	AVMAXSS
	AVMINPD
	AVMINPS
	AVMINSD
	AVMINSS
	AVMOVAPD
	AVMOVAPS
	AVMOVD
	AVMOVDDUP
	AVMOVDQA
	AVMOVDQA32
	AVMOVDQA64
	AVMOVDQU
	AVMOVDQU16
	AVMOVDQU32
	AVMOVDQU64
	AVMOVDQU8
	AVMOVHLPS
	AVMOVHPD
	AVMOVHPS
	AVMOVLHPS
	AVMOVLPD
	AVMOVLPS
	AVMOVMSKPD
	AVMOVMSKPS
	AVMOVNTDQ
	AVMOVNTDQA
	AVMOVNTPD
	AVMOVNTPS
	AVMOVQ
	AVMOVSD
	AVMOVSHDUP
	AVMOVSLDUP
	AVMOVSS
	AVMOVUPD
	AVMOVUPS
	AVMPSADBW
	AVMULPD
	AVMULPS
	AVMULSD
	AVMULSS
	AVORPD
	AVORPS
	AVP4DPWSSD
	AVP4DPWSSDS
	AVPABSB
	AVPABSD
	AVPABSQ
	AVPABSW
	AVPACKSSDW
	AVPACKSSWB
	AVPACKUSDW
	AVPACKUSWB
	AVPADDB
	AVPADDD
	AVPADDQ
	AVPADDSB
	AVPADDSW
	AVPADDUSB
	AVPADDUSW
	AVPADDW
	AVPALIGNR
	AVPAND
	AVPANDD
	AVPANDN
	AVPANDND
	AVPANDNQ
	AVPANDQ
	AVPAVGB
	AVPAVGW
	AVPBLENDD
	AVPBLENDMB
	AVPBLENDMD
	AVPBLENDMQ
	AVPBLENDMW
	AVPBLENDVB
	AVPBLENDW
	AVPBROADCASTB
	AVPBROADCASTD
	AVPBROADCASTMB2Q
	AVPBROADCASTMW2D
	AVPBROADCASTQ
	AVPBROADCASTW
	AVPCLMULQDQ
	AVPCMPB
	AVPCMPD
	AVPCMPEQB
	AVPCMPEQD
	AVPCMPEQQ
	AVPCMPEQW
	AVPCMPESTRI
	AVPCMPESTRM
	AVPCMPGTB
	AVPCMPGTD
	AVPCMPGTQ
	AVPCMPGTW
	AVPCMPISTRI
	AVPCMPISTRM
	AVPCMPQ
	AVPCMPUB
	AVPCMPUD
	AVPCMPUQ
	AVPCMPUW
	AVPCMPW
	AVPCOMPRESSB
	AVPCOMPRESSD
	AVPCOMPRESSQ
	AVPCOMPRESSW
	AVPCONFLICTD
	AVPCONFLICTQ
	AVPDPBUSD
	AVPDPBUSDS
	AVPDPWSSD
	AVPDPWSSDS
	AVPERM2F128
	AVPERM2I128
	AVPERMB
	AVPERMD
	AVPERMI2B
	AVPERMI2D
	AVPERMI2PD
	AVPERMI2PS
	AVPERMI2Q
	AVPERMI2W
	AVPERMILPD
	AVPERMILPS
	AVPERMPD
	AVPERMPS
	AVPERMQ
	AVPERMT2B
	AVPERMT2D
	AVPERMT2PD
	AVPERMT2PS
	AVPERMT2Q
	AVPERMT2W
	AVPERMW
	AVPEXPANDB
	AVPEXPANDD
	AVPEXPANDQ
	AVPEXPANDW
	AVPEXTRB
	AVPEXTRD
	AVPEXTRQ
	AVPEXTRW
	AVPGATHERDD
	AVPGATHERDQ
	AVPGATHERQD
	AVPGATHERQQ
	AVPHADDD
	AVPHADDSW
	AVPHADDW
	AVPHMINPOSUW
	AVPHSUBD
	AVPHSUBSW
	AVPHSUBW
	AVPINSRB
	AVPINSRD
	AVPINSRQ
	AVPINSRW
	AVPLZCNTD
	AVPLZCNTQ
	AVPMADD52HUQ
	AVPMADD52LUQ
	AVPMADDUBSW
	AVPMADDWD
	AVPMASKMOVD
	AVPMASKMOVQ
	AVPMAXSB
	AVPMAXSD
	AVPMAXSQ
	AVPMAXSW
	AVPMAXUB
	AVPMAXUD
	AVPMAXUQ
	AVPMAXUW
	AVPMINSB
	AVPMINSD
	AVPMINSQ
	AVPMINSW
	AVPMINUB
	AVPMINUD
	AVPMINUQ
	AVPMINUW
	AVPMOVB2M
	AVPMOVD2M
	AVPMOVDB
	AVPMOVDW
	AVPMOVM2B
	AVPMOVM2D
	AVPMOVM2Q
	AVPMOVM2W
	AVPMOVMSKB
	AVPMOVQ2M
	AVPMOVQB
	AVPMOVQD
	AVPMOVQW
	AVPMOVSDB
	AVPMOVSDW
	AVPMOVSQB
	AVPMOVSQD
	AVPMOVSQW
	AVPMOVSWB
	AVPMOVSXBD
	AVPMOVSXBQ
	AVPMOVSXBW
	AVPMOVSXDQ
	AVPMOVSXWD
	AVPMOVSXWQ
	AVPMOVUSDB
	AVPMOVUSDW
	AVPMOVUSQB
	AVPMOVUSQD
	AVPMOVUSQW
	AVPMOVUSWB
	AVPMOVW2M
	AVPMOVWB
	AVPMOVZXBD
	AVPMOVZXBQ
	AVPMOVZXBW
	AVPMOVZXDQ
	AVPMOVZXWD
	AVPMOVZXWQ
	AVPMULDQ
	AVPMULHRSW
	AVPMULHUW
	AVPMULHW
	AVPMULLD
	AVPMULLQ
	AVPMULLW
	AVPMULTISHIFTQB
	AVPMULUDQ
	AVPOPCNTB
	AVPOPCNTD
	AVPOPCNTQ
	AVPOPCNTW
	AVPOR
	AVPORD
	AVPORQ
	AVPROLD
	AVPROLQ
	AVPROLVD
	AVPROLVQ
	AVPRORD
	AVPRORQ
	AVPRORVD
	AVPRORVQ
	AVPSADBW
	AVPSCATTERDD
	AVPSCATTERDQ
	AVPSCATTERQD
	AVPSCATTERQQ
	AVPSHLDD
	AVPSHLDQ
	AVPSHLDVD
	AVPSHLDVQ
	AVPSHLDVW
	AVPSHLDW
	AVPSHRDD
	AVPSHRDQ
	AVPSHRDVD
	AVPSHRDVQ
	AVPSHRDVW
	AVPSHRDW
	AVPSHUFB
	AVPSHUFBITQMB
	AVPSHUFD
	AVPSHUFHW
	AVPSHUFLW
	AVPSIGNB
	AVPSIGND
	AVPSIGNW
	AVPSLLD
	AVPSLLDQ
	AVPSLLQ
	AVPSLLVD
	AVPSLLVQ
	AVPSLLVW
	AVPSLLW
	AVPSRAD
	AVPSRAQ
	AVPSRAVD
	AVPSRAVQ
	AVPSRAVW
	AVPSRAW
	AVPSRLD
	AVPSRLDQ
	AVPSRLQ
	AVPSRLVD
	AVPSRLVQ
	AVPSRLVW
	AVPSRLW
	AVPSUBB
	AVPSUBD
	AVPSUBQ
	AVPSUBSB
	AVPSUBSW
	AVPSUBUSB
	AVPSUBUSW
	AVPSUBW
	AVPTERNLOGD
	AVPTERNLOGQ
	AVPTEST
	AVPTESTMB
	AVPTESTMD
	AVPTESTMQ
	AVPTESTMW
	AVPTESTNMB
	AVPTESTNMD
	AVPTESTNMQ
	AVPTESTNMW
	AVPUNPCKHBW
	AVPUNPCKHDQ
	AVPUNPCKHQDQ
	AVPUNPCKHWD
	AVPUNPCKLBW
	AVPUNPCKLDQ
	AVPUNPCKLQDQ
	AVPUNPCKLWD
	AVPXOR
	AVPXORD
	AVPXORQ
	AVRANGEPD
	AVRANGEPS
	AVRANGESD
	AVRANGESS
	AVRCP14PD
	AVRCP14PS
	AVRCP14SD
	AVRCP14SS
	AVRCP28PD
	AVRCP28PS
	AVRCP28SD
	AVRCP28SS
	AVRCPPS
	AVRCPSS
	AVREDUCEPD
	AVREDUCEPS
	AVREDUCESD
	AVREDUCESS
	AVRNDSCALEPD
	AVRNDSCALEPS
	AVRNDSCALESD
	AVRNDSCALESS
	AVROUNDPD
	AVROUNDPS
	AVROUNDSD
	AVROUNDSS
	AVRSQRT14PD
	AVRSQRT14PS
	AVRSQRT14SD
	AVRSQRT14SS
	AVRSQRT28PD
	AVRSQRT28PS
	AVRSQRT28SD
	AVRSQRT28SS
	AVRSQRTPS
	AVRSQRTSS
	AVSCALEFPD
	AVSCALEFPS
	AVSCALEFSD
	AVSCALEFSS
	AVSCATTERDPD
	AVSCATTERDPS
	AVSCATTERPF0DPD
	AVSCATTERPF0DPS
	AVSCATTERPF0QPD
	AVSCATTERPF0QPS
	AVSCATTERPF1DPD
	AVSCATTERPF1DPS
	AVSCATTERPF1QPD
	AVSCATTERPF1QPS
	AVSCATTERQPD
	AVSCATTERQPS
	AVSHUFF32X4
	AVSHUFF64X2
	AVSHUFI32X4
	AVSHUFI64X2
	AVSHUFPD
	AVSHUFPS
	AVSQRTPD
	AVSQRTPS
	AVSQRTSD
	AVSQRTSS
	AVSTMXCSR
	AVSUBPD
	AVSUBPS
	AVSUBSD
	AVSUBSS
	AVTESTPD
	AVTESTPS
	AVUCOMISD
	AVUCOMISS
	AVUNPCKHPD
	AVUNPCKHPS
	AVUNPCKLPD
	AVUNPCKLPS
	AVXORPD
	AVXORPS
	AVZEROALL
	AVZEROUPPER
	AWAIT
	AWBINVD
	AWORD
	AWRFSBASEL
	AWRFSBASEQ
	AWRGSBASEL
	AWRGSBASEQ
	AWRMSR
	AWRPKRU
	AXABORT
	AXACQUIRE
	AXADDB
	AXADDL
	AXADDQ
	AXADDW
	AXBEGIN
	AXCHGB
	AXCHGL
	AXCHGQ
	AXCHGW
	AXEND
	AXGETBV
	AXLAT
	AXORB
	AXORL
	AXORPD
	AXORPS
	AXORQ
	AXORW
	AXRELEASE
	AXRSTOR
	AXRSTOR64
	AXRSTORS
	AXRSTORS64
	AXSAVE
	AXSAVE64
	AXSAVEC
	AXSAVEC64
	AXSAVEOPT
	AXSAVEOPT64
	AXSAVES
	AXSAVES64
	AXSETBV
	AXTEST
	ALAST
)
View Source
const (
	Yxxx = iota
	Ynone
	Yi0 // $0
	Yi1 // $1
	Yu2 // $x, x fits in uint2
	Yi8 // $x, x fits in int8
	Yu8 // $x, x fits in uint8
	Yu7 // $x, x in 0..127 (fits in both int8 and uint8)
	Ys32
	Yi32
	Yi64
	Yiauto
	Yal
	Ycl
	Yax
	Ycx
	Yrb
	Yrl
	Yrl32 // Yrl on 32-bit system
	Yrf
	Yf0
	Yrx
	Ymb
	Yml
	Ym
	Ybr
	Ycs
	Yss
	Yds
	Yes
	Yfs
	Ygs
	Ygdtr
	Yidtr
	Yldtr
	Ymsw
	Ytask
	Ycr0
	Ycr1
	Ycr2
	Ycr3
	Ycr4
	Ycr5
	Ycr6
	Ycr7
	Ycr8
	Ydr0
	Ydr1
	Ydr2
	Ydr3
	Ydr4
	Ydr5
	Ydr6
	Ydr7
	Ytr0
	Ytr1
	Ytr2
	Ytr3
	Ytr4
	Ytr5
	Ytr6
	Ytr7
	Ymr
	Ymm
	Yxr0          // X0 only. "<XMM0>" notation in Intel manual.
	YxrEvexMulti4 // [ X<n> - X<n+3> ]; multisource YxrEvex
	Yxr           // X0..X15
	YxrEvex       // X0..X31
	Yxm
	YxmEvex       // YxrEvex+Ym
	Yxvm          // VSIB vector array; vm32x/vm64x
	YxvmEvex      // Yxvm which permits High-16 X register as index.
	YyrEvexMulti4 // [ Y<n> - Y<n+3> ]; multisource YyrEvex
	Yyr           // Y0..Y15
	YyrEvex       // Y0..Y31
	Yym
	YymEvex   // YyrEvex+Ym
	Yyvm      // VSIB vector array; vm32y/vm64y
	YyvmEvex  // Yyvm which permits High-16 Y register as index.
	YzrMulti4 // [ Z<n> - Z<n+3> ]; multisource YzrEvex
	Yzr       // Z0..Z31
	Yzm       // Yzr+Ym
	Yzvm      // VSIB vector array; vm32z/vm64z
	Yk0       // K0
	Yknot0    // K1..K7; write mask
	Yk        // K0..K7; used for KOP
	Ykm       // Yk+Ym; used for KOP
	Ytls
	Ytextsize
	Yindir
	Ymax
)
View Source
const (
	Zxxx = iota
	Zlit
	Zlitm_r
	Zlitr_m
	Zlit_m_r
	Z_rp
	Zbr
	Zcall
	Zcallcon
	Zcallduff
	Zcallind
	Zcallindreg
	Zib_
	Zib_rp
	Zibo_m
	Zibo_m_xm
	Zil_
	Zil_rp
	Ziq_rp
	Zilo_m
	Zjmp
	Zjmpcon
	Zloop
	Zo_iw
	Zm_o
	Zm_r
	Z_m_r
	Zm2_r
	Zm_r_xm
	Zm_r_i_xm
	Zm_r_xm_nr
	Zr_m_xm_nr
	Zibm_r // mmx1,mmx2/mem64,imm8
	Zibr_m
	Zmb_r
	Zaut_r
	Zo_m
	Zo_m64
	Zpseudo
	Zr_m
	Zr_m_xm
	Zrp_
	Z_ib
	Z_il
	Zm_ibo
	Zm_ilo
	Zib_rr
	Zil_rr
	Zbyte

	Zvex_rm_v_r
	Zvex_rm_v_ro
	Zvex_r_v_rm
	Zvex_i_rm_vo
	Zvex_v_rm_r
	Zvex_i_rm_r
	Zvex_i_r_v
	Zvex_i_rm_v_r
	Zvex
	Zvex_rm_r_vo
	Zvex_i_r_rm
	Zvex_hr_rm_v_r

	Zevex_first
	Zevex_i_r_k_rm
	Zevex_i_r_rm
	Zevex_i_rm_k_r
	Zevex_i_rm_k_vo
	Zevex_i_rm_r
	Zevex_i_rm_v_k_r
	Zevex_i_rm_v_r
	Zevex_i_rm_vo
	Zevex_k_rmo
	Zevex_r_k_rm
	Zevex_r_v_k_rm
	Zevex_r_v_rm
	Zevex_rm_k_r
	Zevex_rm_v_k_r
	Zevex_rm_v_r
	Zevex_last

	Zmax
)
View Source
const (
	Px   = 0
	Px1  = 1    // symbolic; exact value doesn't matter
	P32  = 0x32 // 32-bit only
	Pe   = 0x66 // operand escape
	Pm   = 0x0f // 2byte opcode escape
	Pq   = 0xff // both escapes: 66 0f
	Pb   = 0xfe // byte operands
	Pf2  = 0xf2 // xmm escape 1: f2 0f
	Pf3  = 0xf3 // xmm escape 2: f3 0f
	Pef3 = 0xf5 // xmm escape 2 with 16-bit prefix: 66 f3 0f
	Pq3  = 0x67 // xmm escape 3: 66 48 0f
	Pq4  = 0x68 // xmm escape 4: 66 0F 38
	Pq4w = 0x69 // Pq4 with Rex.w 66 0F 38
	Pq5  = 0x6a // xmm escape 5: F3 0F 38
	Pq5w = 0x6b // Pq5 with Rex.w F3 0F 38
	Pfw  = 0xf4 // Pf3 with Rex.w: f3 48 0f
	Pw   = 0x48 // Rex.w
	Pw8  = 0x90 // symbolic; exact value doesn't matter
	Py   = 0x80 // defaults to 64-bit mode
	Py1  = 0x81 // symbolic; exact value doesn't matter
	Py3  = 0x83 // symbolic; exact value doesn't matter
	Pavx = 0x84 // symbolic: exact value doesn't matter

	RxrEvex = 1 << 4 // AVX512 extension to REX.R/VEX.R
	Rxw     = 1 << 3 // =1, 64-bit operand size
	Rxr     = 1 << 2 // extend modrm reg
	Rxx     = 1 << 1 // extend sib index
	Rxb     = 1 << 0 // extend modrm r/m, sib base, or opcode reg
)
View Source
const (
	REG_NONE = 0
)

Variables

View Source
var AMD64DWARFRegisters = map[int16]int16{
	REG_AX:  0,
	REG_DX:  1,
	REG_CX:  2,
	REG_BX:  3,
	REG_SI:  4,
	REG_DI:  5,
	REG_BP:  6,
	REG_SP:  7,
	REG_R8:  8,
	REG_R9:  9,
	REG_R10: 10,
	REG_R11: 11,
	REG_R12: 12,
	REG_R13: 13,
	REG_R14: 14,
	REG_R15: 15,

	REG_X0: 17,
	REG_X1: 18,
	REG_X2: 19,
	REG_X3: 20,
	REG_X4: 21,
	REG_X5: 22,
	REG_X6: 23,
	REG_X7: 24,

	REG_X8:  25,
	REG_X9:  26,
	REG_X10: 27,
	REG_X11: 28,
	REG_X12: 29,
	REG_X13: 30,
	REG_X14: 31,
	REG_X15: 32,

	REG_F0: 33,
	REG_F1: 34,
	REG_F2: 35,
	REG_F3: 36,
	REG_F4: 37,
	REG_F5: 38,
	REG_F6: 39,
	REG_F7: 40,

	REG_M0: 41,
	REG_M1: 42,
	REG_M2: 43,
	REG_M3: 44,
	REG_M4: 45,
	REG_M5: 46,
	REG_M6: 47,
	REG_M7: 48,

	REG_ES: 50,
	REG_CS: 51,
	REG_SS: 52,
	REG_DS: 53,
	REG_FS: 54,
	REG_GS: 55,

	REG_TR:   62,
	REG_LDTR: 63,

	REG_X16: 67,
	REG_X17: 68,
	REG_X18: 69,
	REG_X19: 70,
	REG_X20: 71,
	REG_X21: 72,
	REG_X22: 73,
	REG_X23: 74,
	REG_X24: 75,
	REG_X25: 76,
	REG_X26: 77,
	REG_X27: 78,
	REG_X28: 79,
	REG_X29: 80,
	REG_X30: 81,
	REG_X31: 82,

	REG_K0: 118,
	REG_K1: 119,
	REG_K2: 120,
	REG_K3: 121,
	REG_K4: 122,
	REG_K5: 123,
	REG_K6: 124,
	REG_K7: 125,
}

https://www.uclibc.org/docs/psABI-x86_64.pdf, figure 3.36

View Source
var Anames = []string{}/* 1599 elements not displayed */
View Source
var Link386 = obj.LinkArch{
	Arch:           sys.Arch386,
	Init:           instinit,
	Preprocess:     preprocess,
	Assemble:       span6,
	Progedit:       progedit,
	UnaryDst:       unaryDst,
	DWARFRegisters: X86DWARFRegisters,
}
View Source
var Linkamd64 = obj.LinkArch{
	Arch:           sys.ArchAMD64,
	Init:           instinit,
	Preprocess:     preprocess,
	Assemble:       span6,
	Progedit:       progedit,
	UnaryDst:       unaryDst,
	DWARFRegisters: AMD64DWARFRegisters,
}
View Source
var Register = []string{}/* 201 elements not displayed */
View Source
var X86DWARFRegisters = map[int16]int16{
	REG_AX: 0,
	REG_CX: 1,
	REG_DX: 2,
	REG_BX: 3,
	REG_SP: 4,
	REG_BP: 5,
	REG_SI: 6,
	REG_DI: 7,

	REG_F0: 11,
	REG_F1: 12,
	REG_F2: 13,
	REG_F3: 14,
	REG_F4: 15,
	REG_F5: 16,
	REG_F6: 17,
	REG_F7: 18,

	REG_X0: 21,
	REG_X1: 22,
	REG_X2: 23,
	REG_X3: 24,
	REG_X4: 25,
	REG_X5: 26,
	REG_X6: 27,
	REG_X7: 28,

	REG_M0: 29,
	REG_M1: 30,
	REG_M2: 31,
	REG_M3: 32,
	REG_M4: 33,
	REG_M5: 34,
	REG_M6: 35,
	REG_M7: 36,

	REG_ES:   40,
	REG_CS:   41,
	REG_SS:   42,
	REG_DS:   43,
	REG_FS:   44,
	REG_GS:   45,
	REG_TR:   48,
	REG_LDTR: 49,
}

https://www.uclibc.org/docs/psABI-i386.pdf, table 2.14

Functions

func CanUse1InsnTLS added in go1.7

func CanUse1InsnTLS(ctxt *obj.Link) bool

func EncodeRegisterRange added in go1.11

func EncodeRegisterRange(reg0, reg1 int16) int64

EncodeRegisterRange packs [reg0-reg1] list into 64-bit value that is intended to be stored inside obj.Addr.Offset with TYPE_REGLIST.

func ParseSuffix added in go1.11

func ParseSuffix(p *obj.Prog, cond string) error

ParseSuffix handles the special suffix for the 386/AMD64. Suffix bits are stored into p.Scond.

Leading "." in cond is ignored.

Types

type AsmBuf added in go1.9

type AsmBuf struct {
	// contains filtered or unexported fields
}

AsmBuf is a simple buffer to assemble variable-length x86 instructions into and hold assembly state.

func (*AsmBuf) At added in go1.9

func (ab *AsmBuf) At(i int) byte

At returns the byte at offset i.

func (*AsmBuf) Bytes added in go1.9

func (ab *AsmBuf) Bytes() []byte

Bytes returns the contents of the buffer.

func (*AsmBuf) Insert added in go1.9

func (ab *AsmBuf) Insert(i int, b byte)

Insert inserts b at offset i.

func (*AsmBuf) Last added in go1.9

func (ab *AsmBuf) Last() byte

Last returns the byte at the end of the buffer.

func (*AsmBuf) Len added in go1.9

func (ab *AsmBuf) Len() int

Len returns the length of the buffer.

func (*AsmBuf) Put added in go1.9

func (ab *AsmBuf) Put(b []byte)

Put copies b into the buffer.

func (*AsmBuf) Put1 added in go1.9

func (ab *AsmBuf) Put1(x byte)

Put1 appends one byte to the end of the buffer.

func (*AsmBuf) Put2 added in go1.9

func (ab *AsmBuf) Put2(x, y byte)

Put2 appends two bytes to the end of the buffer.

func (*AsmBuf) Put3 added in go1.9

func (ab *AsmBuf) Put3(x, y, z byte)

Put3 appends three bytes to the end of the buffer.

func (*AsmBuf) Put4 added in go1.9

func (ab *AsmBuf) Put4(x, y, z, w byte)

Put4 appends four bytes to the end of the buffer.

func (*AsmBuf) PutInt16 added in go1.9

func (ab *AsmBuf) PutInt16(v int16)

PutInt16 writes v into the buffer using little-endian encoding.

func (*AsmBuf) PutInt32 added in go1.9

func (ab *AsmBuf) PutInt32(v int32)

PutInt32 writes v into the buffer using little-endian encoding.

func (*AsmBuf) PutInt64 added in go1.9

func (ab *AsmBuf) PutInt64(v int64)

PutInt64 writes v into the buffer using little-endian encoding.

func (*AsmBuf) PutOpBytesLit added in go1.11

func (ab *AsmBuf) PutOpBytesLit(offset int, op *opBytes)

PutOpBytesLit writes zero terminated sequence of bytes from op, starting at specified offset (e.g. z counter value). Trailing 0 is not written.

Intended to be used for literal Z cases. Literal Z cases usually have "Zlit" in their name (Zlit, Zlitr_m, Zlitm_r).

func (*AsmBuf) Reset added in go1.9

func (ab *AsmBuf) Reset()

Reset empties the buffer.

type Optab

type Optab struct {
	// contains filtered or unexported fields
}

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