bcm2835

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 Go to latest Published: Mar 7, 2022 License: BSD-3-Clause, BSD-3-Clause Imports: 9 Imported by: 0

README

TamaGo - bare metal Go for ARM SoCs - BCM2835 support

tamago | https://github.com/f-secure-foundry/tamago

Copyright (c) the bcm2835 package authors

Contributors

Kenneth Bell

Introduction

TamaGo is a framework that enables compilation and execution of unencumbered Go applications on bare metal ARM System-on-Chip (SoC) components.

The bcm2835 package provides support for the Broadcom BCM2835 series of SoC.

Documentation

For TamaGo see its repository and project wiki for information.

The package API documentation can be found on pkg.go.dev.

Supported hardware

SoC Related board packages Peripheral drivers
BCM2835 pizero RNG, UART, GPIO
BCM2836 pi2 RNG, UART, GPIO

See the pi package for documentation on compiling and executing on these boards.

License

tamago | https://github.com/f-secure-foundry/tamago
Copyright (c) F-Secure Corporation

bcm2835 | https://github.com/f-secure-foundry/tamago/tree/master/soc/bcm2835
Copyright (c) the bcm2835 package authors

These source files are distributed under the BSD-style license found in the LICENSE file.

Documentation

Overview

Package bcm2835 provides support to Go bare metal unikernels written using the TamaGo framework on BCM2835/BCM2836 SoCs.

This package is only meant to be used with `GOOS=tamago GOARCH=arm` as supported by the TamaGo framework for bare metal Go on ARM SoCs, see https://github.com/f-secure-foundry/tamago.

Index

Constants

View Source 
const (
	// Base address of the first channel.
	DMA_CH_BASE0 = 0x7000

	// Base address of the 16th channel (ch 15).
	//
	// Channel 15 is register space is non-contiguous with other
	// channels.
	DMA_CH_BASE15 = 0x5000

	// Offset of each channel's registers from previous.
	DMA_CH_SPAN = 0x100
)

Channel base addresses

View Source 
const (
	// Control and Status
	DMA_CH_REG_CS = 0x00

	// Control Block Address
	DMA_CH_REG_CONBLK_AD = 0x04

	// Debug
	DMA_CH_REG_DEBUG = 0x20
)

Layout of registers for each channel

View Source 
const (
	// Activate (start) the DMA transfer
	DMA_CS_ACTIVE = 1 << 0

	// Indicates the DMA transfer is complete
	DMA_CS_END = 1 << 1

	// Interrupt Status
	DMA_CS_INT = 1 << 2

	// DREQ Status
	DMA_CS_DREQ = 1 << 3

	// Indicates the DMA transfer has been paused
	DMA_CS_PAUSED = 1 << 4

	// Indicates DMA is paused due to DREQ
	DMA_CS_DREQ_STOPS_DMA = 1 << 5

	// Indicates if the DMA is waiting for outstanding writes
	DMA_CS_WAITING_FOR_OUTSTANDING_WRITES = 1 << 6

	// Indicates if a DMA error occured
	DMA_CS_ERROR = 1 << 8

	// Sets Priority on the AXI bus
	DMA_CS_PRIORITY_SHIFT = 16
	DMA_CS_PRIORITY_MASK  = 0xF

	// Sets the Panic priority on the AXI bus
	DMA_CS_PANIC_PRIORITY_SHIFT = 20
	DMA_CS_PANIC_PRIORITY_MASK  = 0xF

	// Limits outstanding writes and waits for completion at end of transfer
	DMA_CS_WAIT_FOR_OUTSTANDING_WRITES = 1 << 28

	// Disables debug pause
	DMA_CS_DISDEBUG = 1 << 29

	// Aborts the current control block (transfer segment)
	DMA_CS_ABORT = 1 << 30

	// Resets the DMA channel
	DMA_CS_RESET = 1 << 31
)

DMA Control and Status flags

These are a mix of read-only, write-only, read/write

View Source 
const (
	// Interrupt Enable (signal on transfer complete)
	DMA_TI_INTEN = 0x1 << 0

	// Use two-dimensional (striped) mode
	DMA_TI_TDMODE = 0x1 << 1

	// Wait for write response
	DMA_TI_WAITRESP = 0x1 << 3

	// Increment destination address
	DMA_TI_DEST_INC = 0x1 << 4

	// Destination transfer width (1 = 128bit, 0 = 32bit)
	DMA_TI_DEST_WIDTH = 0x1 << 5

	// Control writes with DREQ (allow peripheral to control speed)
	DMA_TI_DEST_DREQ = 0x1 << 6

	// Ignore writes (do not perform writes)
	DMA_TI_DEST_IGNORE = 0x1 << 7

	// Increment source address
	DMA_TI_SRC_INC = 0x1 << 8

	// Source transfer width (1 = 128bit, 0 = 32bit)
	DMA_TI_SRC_WIDTH = 0x1 << 9

	// Control reads with DREQ (allow peripheral to control speed)
	DMA_TI_SRC_DREQ = 0x1 << 10

	// Ignore reads (do not perform reads)
	DMA_TI_SRC_IGNORE = 0x1 << 11

	// 4-bit burst length requested
	DMA_TI_BURST_LENGTH_SHIFT = 12
	DMA_TI_BURST_LENGTH_MASK  = 0xF

	// Peripheral ID for DREQ rate control
	DMA_TI_BURST_PERMAP_SHIFT = 16
	DMA_TI_BURST_PREMAP_MASK  = 0x1F

	// Add wait cycles between each DMA read or write
	DMA_TI_WAITS_SHIFT = 21
	DMA_TI_WAITS_MASK  = 0x1F

	// Don't do wide bursts
	DMA_TI_NO_WIDE_BURSTS = 0x1 << 26
)

DMA Transfer Information control flags

View Source 
const (
	// Indicates AXI read last signal was not set when expected
	DMA_DEBUG_READ_LAST_NOT_SET_ERROR = 0x1 << 0

	// Indicates FIFO error
	DMA_DEBUG_FIFO_ERROR = 0x1 << 1

	// Indicates read error
	DMA_DEBUG_READ_ERROR = 0x1 << 2

	// Indicates outstanding writes
	DMA_DEBUG_OUTSTANDING_WRITES_SHIFT = 4
	DMA_DEBUG_OUTSTANDING_WRITE_MASK   = 0xF

	// Gets the AXI ID of this channel
	DMA_DEBUG_DMA_ID_SHIFT = 8
	DMA_DEBUG_DMA_ID_MASK  = 0xFF

	// Gets the DMA engine state
	DMA_DEBUG_DMA_STATE_SHIFT = 16
	DMA_DEBUG_DMA_STATE_MASK  = 0xFF

	// Gets the DMA version
	DMA_DEBUG_VERSION_SHIFT = 25
	DMA_DEBUG_VERSION_MASK  = 0x7

	// Indicates if this is a reduced performance channel
	DMA_DEBUG_LITE = 1 << 28
)

DMA Debug flags

View Source 
const (
	GPIO_BASE = 0x200000

	GPFSEL0   = GPIO_BASE
	GPFSEL1   = GPIO_BASE + 0x04
	GPSET0    = GPIO_BASE + 0x1c
	GPCLR0    = GPIO_BASE + 0x28
	GPLEV0    = GPIO_BASE + 0x34
	GPPUD     = GPIO_BASE + 0x94
	GPPUDCLK0 = GPIO_BASE + 0x98
)

GPIO registers

View Source 
const (
	GPIO_INPUT  = 0b000
	GPIO_OUTPUT = 0b001
	GPIO_FN0    = 0b100
	GPIO_FN1    = 0b101
	GPIO_FN2    = 0b110
	GPIO_FN3    = 0b111
	GPIO_FN4    = 0b011
	GPIO_FN5    = 0b010
)

GPIO function selections (p92, BCM2835 ARM Peripherals)

View Source 
const (
	MAILBOX_REGION_BASE = 0xC000
	MAILBOX_REGION_SIZE = 0x4000
)

We reserve the 'gap' above excStack and below TEXT segment start for mailbox usage. There is nothing requiring use of this region, but it is convenient since it is always available. Other regions could be used by adjusting ramSize to provide space at top of address range.

View Source 
const (
	MAILBOX_BASE       = 0xB880
	MAILBOX_READ_REG   = MAILBOX_BASE + 0x00
	MAILBOX_STATUS_REG = MAILBOX_BASE + 0x18
	MAILBOX_WRITE_REG  = MAILBOX_BASE + 0x20
	MAILBOX_FULL       = 0x80000000
	MAILBOX_EMPTY      = 0x40000000
)

Registers for using mailbox

View Source 
const (
	VC_CH_POWERMGMT            = 0
	VC_CH_FRAMEBUFFER          = 1
	VC_CH_VIRTUALUART          = 2
	VC_CH_VCHIQ                = 3
	VC_CH_LEDS                 = 4
	VC_CH_BUTTONS              = 5
	VC_CH_TOUCHSCREEN          = 6
	VC_CH_PROPERTYTAGS_A_TO_VC = 8
	VC_CH_PROPERTYTAGS_VC_TO_A = 9
)

Channels (see <https://github.com/raspberrypi/firmware/wiki/Mailboxes>)

View Source 
const (
	VC_FIRMWARE_GET_REV     = 0x00000001
	VC_FIRMWARE_GET_REV_LEN = 4

	VC_BOARD_GET_MODEL     = 0x00010001
	VC_BOARD_GET_MODEL_LEN = 4

	VC_BOARD_GET_REV     = 0x00010002
	VC_BOARD_GET_REV_LEN = 4

	VC_BOARD_GET_MAC     = 0x00010003
	VC_BOARD_GET_MAC_LEN = 6

	VC_BOARD_GET_SERIAL     = 0x00010004
	VC_BOARD_GET_SERIAL_LEN = 8

	VC_BOARD_GET_ARM_MEMORY     = 0x00010005
	VC_BOARD_GET_ARM_MEMORY_LEN = 8

	VC_BOARD_GET_VC_MEMORY     = 0x00010006
	VC_BOARD_GET_VC_MEMORY_LEN = 8

	VC_BOARD_GET_CLOCKS = 0x00010007

	VC_CFG_GET_CMDLINE = 0x00050001

	VC_RES_GET_DMACHANNELS     = 0x00060001
	VC_RES_GET_DMACHANNELS_LEN = 4

	VC_POWER_GET_STATE     = 0x00020001
	VC_POWER_GET_STATE_LEN = 8

	VC_POWER_GET_TIMING     = 0x00020002
	VC_POWER_GET_TIMING_LEN = 8

	VC_POWER_SET_STATE     = 0x00028001
	VC_POWER_SET_STATE_LEN = 8

	VC_CLOCK_GET_STATE     = 0x00030001
	VC_CLOCK_GET_STATE_LEN = 8

	VC_CLOCK_SET_STATE     = 0x00038001
	VC_CLOCK_SET_STATE_LEN = 8

	VC_CLOCK_GET_RATE     = 0x00030002
	VC_CLOCK_GET_RATE_LEN = 8

	VC_CLOCK_SET_RATE     = 0x00038002
	VC_CLOCK_SET_RATE_LEN = 12

	VC_CLOCK_GET_MAX_RATE     = 0x00030004
	VC_CLOCK_GET_MAX_RATE_LEN = 8

	VC_CLOCK_GET_MIN_RATE     = 0x00030007
	VC_CLOCK_GET_MIN_RATE_LEN = 8

	VC_CLOCK_GET_TURBO     = 0x00030009
	VC_CLOCK_GET_TURBO_LEN = 8

	VC_CLOCK_SET_TURBO     = 0x00038009
	VC_CLOCK_SET_TURBO_LEN = 8

	VC_VOLT_GET     = 0x00030003
	VC_VOLT_GET_LEN = 8

	VC_VOLT_SET     = 0x00038003
	VC_VOLT_SET_LEN = 8

	VC_VOLT_GET_MAX     = 0x00030005
	VC_VOLT_GET_MAX_LEN = 8

	VC_VOLT_GET_MIN     = 0x00030008
	VC_VOLT_GET_MIN_LEN = 8

	VC_TEMP_GET     = 0x00030006
	VC_TEMP_GET_LEN = 8

	VC_TEMP_GET_MAX     = 0x0003000a
	VC_TEMP_GET_MAX_LEN = 8

	VC_MEM_ALLOCATE     = 0x0003000c
	VC_MEM_ALLOCATE_LEN = 12

	VC_MEM_LOCK     = 0x0003000d
	VC_MEM_LOCK_LEN = 4

	VC_MEM_UNLOCK     = 0x0003000e
	VC_MEM_UNLOCK_LEN = 4

	VC_MEM_RELEASE     = 0x0003000f
	VC_MEM_RELEASE_LEN = 4

	VC_MEM_EXEC     = 0x00030010
	VC_MEM_EXEC_LEN = 28

	VC_MEM_GET_DISPMANX_HANDLE     = 0x00030014
	VC_MEM_GET_DISPMANX_HANDLE_LEN = 8

	VC_MEM_GET_EDID_BLOCK     = 0x00030020
	VC_MEM_GET_EDID_BLOCK_LEN = 136

	VC_FB_ALLOC_BUFFER     = 0x00040001
	VC_FB_ALLOC_BUFFER_LEN = 8

	VC_FB_RELEASE_BUFFER     = 0x00048001
	VC_FB_RELEASE_BUFFER_LEN = 0

	VC_FB_BLANK_SCREEN     = 0x00040002
	VC_FB_BLANK_SCREEN_LEN = 0

	VC_FB_GET_PHYSICAL_SIZE     = 0x00040003
	VC_FB_GET_PHYSICAL_SIZE_LEN = 8

	VC_FB_TEST_PHYSICAL_SIZE     = 0x00044003
	VC_FB_TEST_PHYSICAL_SIZE_LEN = 8

	VC_FB_SET_PHYSICAL_SIZE     = 0x00048003
	VC_FB_SET_PHYSICAL_SIZE_LEN = 8

	VC_FB_GET_VIRTUAL_SIZE     = 0x00040004
	VC_FB_GET_VIRTUAL_SIZE_LEN = 8

	VC_FB_TEST_VIRTUAL_SIZE     = 0x00044004
	VC_FB_TEST_VIRTUAL_SIZE_LEN = 8

	VC_FB_SET_VIRTUAL_SIZE     = 0x00048004
	VC_FB_SET_VIRTUAL_SIZE_LEN = 8

	VC_FB_GET_DEPTH     = 0x00040005
	VC_FB_GET_DEPTH_LEN = 4

	VC_FB_TEST_DEPTH     = 0x00044005
	VC_FB_TEST_DEPTH_LEN = 4

	VC_FB_SET_DEPTH     = 0x00048005
	VC_FB_SET_DEPTH_LEN = 4

	VC_FB_GET_PIXEL_ORDER     = 0x00040006
	VC_FB_GET_PIXEL_ORDER_LEN = 4

	VC_FB_TEST_PIXEL_ORDER     = 0x00044006
	VC_FB_TEST_PIXEL_ORDER_LEN = 4

	VC_FB_SET_PIXEL_ORDER     = 0x00048006
	VC_FB_SET_PIXEL_ORDER_LEN = 4

	VC_FB_GET_ALPHA_MODE     = 0x00040007
	VC_FB_GET_ALPHA_MODE_LEN = 4

	VC_FB_TEST_ALPHA_MODE     = 0x00044007
	VC_FB_TEST_ALPHA_MODE_LEN = 4

	VC_FB_SET_ALPHA_MODE     = 0x00048007
	VC_FB_SET_ALPHA_MODE_LEN = 4

	VC_FB_GET_PITCH     = 0x00040008
	VC_FB_GET_PITCH_LEN = 4

	VC_FB_GET_VIRTUAL_OFFSET     = 0x00040009
	VC_FB_GET_VIRTUAL_OFFSET_LEN = 8

	VC_FB_TEST_VIRTUAL_OFFSET     = 0x00044009
	VC_FB_TEST_VIRTUAL_OFFSET_LEN = 8

	VC_FB_SET_VIRTUAL_OFFSET     = 0x00048009
	VC_FB_SET_VIRTUAL_OFFSET_LEN = 8

	VC_FB_GET_OVERSCAN     = 0x0004000a
	VC_FB_GET_OVERSCAN_LEN = 16

	VC_FB_TEST_OVERSCAN     = 0x0004400a
	VC_FB_TEST_OVERSCAN_LEN = 16

	VC_FB_SET_OVERSCAN     = 0x0004800a
	VC_FB_SET_OVERSCAN_LEN = 16

	VC_FB_GET_PALETTE     = 0x0004000b
	VC_FB_GET_PALETTE_LEN = 1024

	VC_FB_TEST_PALETTE = 0x0004400b

	VC_FB_SET_PALETTE = 0x0004800b

	VC_FB_SET_CURSOR_INFO     = 0x00008010
	VC_FB_SET_CURSOR_INFO_LEN = 24

	VC_FB_SET_CURSOR_STATE     = 0x00008011
	VC_FB_SET_CURSOR_STATE_LEN = 16
)

Tags (see <https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface>)

For fixed length messages, message lengths are provided as the larger of the request or response size, since response overwrites the request buffer and caller is responsible for allocation.

View Source 
const (
	AUX_ENABLES     = 0x215004
	AUX_MU_IO_REG   = 0x215040
	AUX_MU_IER_REG  = 0x215044
	AUX_MU_IIR_REG  = 0x215048
	AUX_MU_LCR_REG  = 0x21504C
	AUX_MU_MCR_REG  = 0x215050
	AUX_MU_LSR_REG  = 0x215054
	AUX_MU_MSR_REG  = 0x215058
	AUX_MU_SCRATCH  = 0x21505C
	AUX_MU_CNTL_REG = 0x215060
	AUX_MU_STAT_REG = 0x215064
	AUX_MU_BAUD_REG = 0x215068
)
View Source 
const (
	RNG_BASE = 0x104000

	RNG_CTRL = RNG_BASE + 0x0
	CTRL_EN  = 1

	RNG_STATUS = RNG_BASE + 0x4
	RNG_DATA   = RNG_BASE + 0x8
)

RNG registers

View Source 
const (
	GPU_MEMORY_FLAG_DISCARDABLE      = 1 << 0
	GPU_MEMORY_FLAG_NORMAL           = 0 << 2
	GPU_MEMORY_FLAG_DIRECT           = 1 << 2
	GPU_MEMORY_FLAG_COHERENT         = 2 << 2
	GPU_MEMORY_FLAG_L1_NONALLOCATING = 3 << 2
	GPU_MEMORY_FLAG_ZERO             = 1 << 4
	GPU_MEMORY_FLAG_NO_INIT          = 1 << 5
	GPU_MEMORY_FLAG_HINT_PERMALOCK   = 1 << 6
)
View Source 
const DRAM_FLAG_NOCACHE = 0xC0000000

DRAM_FLAG_NOCACHE disables caching by setting to high bits

View Source 
const SysTimerFreq = 1000000

SysTimerFreq is the frequency (Hz) of the BCM2835 free-running timer (fixed at 1Hz).

View Source 
const WatchdogPeriod = uint64(16 * time.Microsecond)

WatchdogPeriod is the fixed 16us frequency of the BCM2835 watchdog.

Variables

View Source 
var ARM = &arm.CPU{}

ARM processor instance

View Source 
var DMA = DMAController{}

DMA provides access to the DMA controller

View Source 
var Mailbox = mailbox{}

Mailbox provides access to the BCM2835 mailbox used to communicate with the VideoCore CPU

View Source 
var MiniUART = &miniUART{}

MiniUART is a secondary low throughput UART intended to be used as a console.

View Source 
var RNG = &Rng{}

RNG (Random Number Generator) instance

Functions

func AllocateGPUMemory 

func AllocateGPUMemory(size uint32, alignment uint32, flags uint32) (handle uint32)

AllocateGPUMemory allocates space from the GPU address space

The returned value is a handle, use LockMemory to convert to an address.

func BoardModel 

func BoardModel() uint32

BoardModel gets the board model

func CPUAvailableDMAChannels 

func CPUAvailableDMAChannels() (bitmask uint32)

CPUAvailableDMAChannels gets the DMA channels available to the ARM core(s)

func CPUMemory 

func CPUMemory() (start uint32, size uint32)

CPUMemory gets the memory ranges allocated to the ARM core(s)

func FirmwareRevision 

func FirmwareRevision() uint32

FirmwareRevision gets the firmware rev of the VideoCore GPU

func GPUMemory 

func GPUMemory() (start uint32, size uint32)

GPUMemory gets the memory ranges allocated to VideoCore

func Init 

func Init(base uint32)

Init takes care of the lower level SoC initialization triggered early in runtime setup.

func LockGPUMemory 

func LockGPUMemory(handle uint32) (addr uint32)

LockGPUMemory provides the address of previously allocated memory

func MACAddress 

func MACAddress() []byte

MACAddress gets the board's MAC address

func PeripheralAddress 

func PeripheralAddress(offset uint32) uint32

PeripheralAddress returns the absolute address for a peripheral. The Pi boards map 'bus addresses' to board specific base addresses but with consistent layout otherwise.

func Serial 

func Serial() uint32

Serial gets the board's serial number

Types

type DMAChannel 

type DMAChannel struct {
	// contains filtered or unexported fields
}

DMAChannel controls a specific DMA channel on the DMA controller

func (*DMAChannel) Copy 

func (ch *DMAChannel) Copy(from uint32, size int, to uint32)

Do a RAM to RAM transfer.

This method blocks until the transfer is complete, but does allow the Go scheduler to schedule other Go routines.

func (*DMAChannel) DebugInfo 

func (ch *DMAChannel) DebugInfo() DMADebugInfo

Debug state for the channel

func (*DMAChannel) Status 

func (ch *DMAChannel) Status() DMAStatus

Status of the channel

type DMAController 

type DMAController struct {
	sync.Mutex
	// contains filtered or unexported fields
}

func (*DMAController) AllocChannel 

func (c *DMAController) AllocChannel() (*DMAChannel, error)

AllocChannel provides exclusive use of a DMA channel

func (*DMAController) FreeChannel 

func (c *DMAController) FreeChannel(ch *DMAChannel) error

FreeChannel surrenders exclusive use of a DMA channel

func (*DMAController) Init 

func (c *DMAController) Init(rgn *dma.Region)

Initialize the controller.

The given region provides a memory region dedicated for DMA transfer purposes

type DMADebugInfo 

type DMADebugInfo uint32

Access to the debug flag bitfield

func (DMADebugInfo) FIFOError 

func (i DMADebugInfo) FIFOError() bool

Indicates a FIFO error condition

func (DMADebugInfo) ID 

func (i DMADebugInfo) ID() int

AXI ID of this channel

func (DMADebugInfo) Lite 

func (i DMADebugInfo) Lite() bool

Indicates if reduced performance 'lite' engine

func (DMADebugInfo) OutstandingWrites 

func (i DMADebugInfo) OutstandingWrites() int

Currently outstanding writes

func (DMADebugInfo) ReadError 

func (i DMADebugInfo) ReadError() bool

Indicates a read error

func (DMADebugInfo) ReadLastNotSetError 

func (i DMADebugInfo) ReadLastNotSetError() bool

Indicates the last AXI read signal was not set when expected

func (DMADebugInfo) State 

func (i DMADebugInfo) State() int

State Machine State

func (DMADebugInfo) String 

func (i DMADebugInfo) String() string

Compat representation of the DMA debug status for debugging

func (DMADebugInfo) Version 

func (i DMADebugInfo) Version() int

Version

type DMAStatus 

type DMAStatus uint32

Access to the status flag bitfield

func (DMAStatus) Active 

func (s DMAStatus) Active() bool

Indicates if a transfer is active

func (DMAStatus) DReq 

func (s DMAStatus) DReq() bool

Gets the DREQ state

func (DMAStatus) DReqStopsDMA 

func (s DMAStatus) DReqStopsDMA() bool

Indicates if the transfer is currently paused due to DREQ state

func (DMAStatus) DisableDebug 

func (s DMAStatus) DisableDebug() bool

Indicates if the debug pause signal is disabled

func (DMAStatus) End 

func (s DMAStatus) End() bool

Indicates if the transfer is complete

func (DMAStatus) Error 

func (s DMAStatus) Error() bool

Indicates if there is an error state on the channel

func (DMAStatus) Int 

func (s DMAStatus) Int() bool

Gets the interrupt status

func (DMAStatus) PanicPriority 

func (s DMAStatus) PanicPriority() int

Gets the AXI panic priority level of the channel

func (DMAStatus) Paused 

func (s DMAStatus) Paused() bool

Indicates if the transfer is currently paused

func (DMAStatus) Priority 

func (s DMAStatus) Priority() int

Gets the AXI priority level of the channel

func (DMAStatus) String 

func (s DMAStatus) String() string

Compat representation of the DMA channel status for debugging

func (DMAStatus) WaitForOutstandingWrites 

func (s DMAStatus) WaitForOutstandingWrites() bool

Indicates if the channel will wait for all writes to complete

func (DMAStatus) WaitingForOutstandingWrites 

func (s DMAStatus) WaitingForOutstandingWrites() bool

Indicates if the transfer is waiting for last write to complete

type GPIO 

type GPIO struct {
	// contains filtered or unexported fields
}

GPIO instance

func NewGPIO 

func NewGPIO(num int) (*GPIO, error)

NewGPIO gets access to a single GPIO line

func (*GPIO) GetFunction 

func (gpio *GPIO) GetFunction(line int) GPIOFunction

GetFunction gets the current function of a GPIO line

func (*GPIO) High 

func (gpio *GPIO) High()

High configures a GPIO signal as high.

func (*GPIO) In 

func (gpio *GPIO) In()

In configures a GPIO as input.

func (*GPIO) Low 

func (gpio *GPIO) Low()

Low configures a GPIO signal as low.

func (*GPIO) Out 

func (gpio *GPIO) Out()

Out configures a GPIO as output.

func (*GPIO) PullUpDown 

func (gpio *GPIO) PullUpDown(val uint32)

PullUpDown controls the pull-up or pull-down state of the line.

The pull-up / pull-down state persists across power-down state of the CPU (i.e. always set the pull-up / pull-down to desired state before using a GPIO pin).

func (*GPIO) SelectFunction 

func (gpio *GPIO) SelectFunction(n GPIOFunction) (err error)

SelectFunction selects the function of a GPIO line.

func (*GPIO) Value 

func (gpio *GPIO) Value() (high bool)

Value returns the GPIO signal level.

type GPIOFunction 

type GPIOFunction uint32

type MailboxMessage 

type MailboxMessage struct {
	MinSize int
	Code    uint32
	Tags    []MailboxTag
}

func (*MailboxMessage) Error 

func (m *MailboxMessage) Error() bool

func (*MailboxMessage) Tag 

func (m *MailboxMessage) Tag(code uint32) *MailboxTag

type MailboxTag 

type MailboxTag struct {
	ID     uint32
	Buffer []byte
}

type Rng 

type Rng struct {
	sync.Mutex
	// contains filtered or unexported fields
}

Rng represents a Random number generator instance

func (*Rng) Init 

func (hw *Rng) Init()

Init initializes the RNG by discarding 'warmup bytes'.

Source Files

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