Documentation
¶
Index ¶
- Constants
- Variables
- func HI_MODULE_DeInit() (bool, error)
- func HI_MODULE_GetModuleName(u32ModuleID HI_U32) (string, error)
- func HI_MODULE_Init() (bool, error)
- func HI_MODULE_Register(u32ModuleID HI_U32, pszModuleName string) (bool, error)
- func HI_MODULE_RegisterByName(pszModuleName string, pu32ModuleID *HI_U32) (bool, error)
- func HI_MODULE_UnRegister(u32ModuleID HI_U32) (bool, error)
- func HI_UNF_DMX_DeInit() (bool, error)
- func HI_UNF_DMX_GetCapability(pstCap *HI_UNF_DMX_CAPABILITY_S) (bool, error)
- func HI_UNF_DMX_Init() (bool, error)
- func HI_UNF_IR_DeInit() (bool, error)
- func HI_UNF_IR_DisableProtocol(pszProtocolName string) (bool, error)
- func HI_UNF_IR_Enable(bEnable HI_BOOL) (bool, error)
- func HI_UNF_IR_EnableKeyUp(bEnable HI_BOOL) (bool, error)
- func HI_UNF_IR_EnableProtocol(pszProtocolName string) (bool, error)
- func HI_UNF_IR_EnableRepKey(bEnable HI_BOOL) (bool, error)
- func HI_UNF_IR_GetProtocol(penProtocol *HI_UNF_IR_PROTOCOL_E) (bool, error)
- func HI_UNF_IR_GetProtocolEnabled(pszProtocolName string) (bool, error)
- func HI_UNF_IR_GetProtocolName(pProtocolName *HI_CHAR, s32BufLen HI_S32) (bool, error)
- func HI_UNF_IR_GetSymbol(pu64First *HI_U64, pu64Second *HI_U64, u32TimeoutMs HI_U32) (bool, error)
- func HI_UNF_IR_Init() (bool, error)
- func HI_UNF_IR_Reset() (bool, error)
- func HI_UNF_IR_SetCodeType(enIRCode HI_UNF_IR_CODE_E) bool
- func HI_UNF_IR_SetFetchMode(bMode HI_BOOL) (bool, error)
- func HI_UNF_IR_SetRepKeyTimeoutAttr(u32TimeoutMs HI_U32) (bool, error)
- func HI_UNF_SCI_Close(port HI_UNF_SCI_PORT_E) (bool, error)
- func HI_UNF_SCI_ConfigClkMode(mode SCI_IO_OUTPUTTYPE_S) (bool, error)
- func HI_UNF_SCI_ConfigDetect(level SCI_LEVEL_S) (bool, error)
- func HI_UNF_SCI_ConfigResetMode(mode SCI_IO_OUTPUTTYPE_S) (bool, error)
- func HI_UNF_SCI_ConfigVccEn(level SCI_LEVEL_S) (bool, error)
- func HI_UNF_SCI_ConfigVccEnMode(mode SCI_IO_OUTPUTTYPE_S) (bool, error)
- func HI_UNF_SCI_DeInit() (bool, error)
- func HI_UNF_SCI_DeactiveCard(port HI_UNF_SCI_PORT_E) (bool, error)
- func HI_UNF_SCI_GetATR(atr *SCI_ATR_S) (bool, error)
- func HI_UNF_SCI_GetCardStatus(status *SCI_STATUS_S) (bool, error)
- func HI_UNF_SCI_GetPPSResponData(pps *SCI_PPS_S) (bool, error)
- func HI_UNF_SCI_GetParams(params *HI_UNF_SCI_PARAMS_S) (bool, error)
- func HI_UNF_SCI_Init() (bool, error)
- func HI_UNF_SCI_NegotiatePPS(pps SCI_PPS_S) (bool, error)
- func HI_UNF_SCI_Open(config SCI_OPEN_S) (bool, error)
- func HI_UNF_SCI_Receive(data *SCI_DATA_S) (bool, error)
- func HI_UNF_SCI_ResetCard(reset SCI_RESET_S) (bool, error)
- func HI_UNF_SCI_Send(data *SCI_DATA_S) (bool, error)
- func HI_UNF_SCI_SetBlockTimeout(timeout SCI_BLOCKTIMEOUT_S) (bool, error)
- func HI_UNF_SCI_SetCharTimeout(timeout SCI_CHARTIMEOUT_S) (bool, error)
- func HI_UNF_SCI_SetEtuFactor(baudrate SCI_EXT_BAUD_S) (bool, error)
- func HI_UNF_SCI_SetGuardTime(guard SCI_ADD_GUARD_S) (bool, error)
- func HI_UNF_SCI_SetTxRetries(tx SCI_TXRETRY_S) (bool, error)
- func HI_UNF_SCI_SwitchCard(config SCI_OPEN_S) (bool, error)
- func Io(t, nr uintptr) uintptr
- func IoR(t, nr, size uintptr) uintptr
- func IoRW(t, nr, size uintptr) uintptr
- func IoW(t, nr, size uintptr) uintptr
- func Ioctl(fd, op uintptr, arg interface{}) error
- type DMX_AcqMsg_S
- type DMX_BUF_FLAG_E
- type DMX_BUF_S
- type DMX_CB_DESC_S
- type DMX_ChanChanTsCnt_S
- type DMX_ChanNew_S
- type DMX_ChanPIDGet_S
- type DMX_ChanPIDSet_S
- type DMX_ChanStatusGet_S
- type DMX_ChannelIdGet_S
- type DMX_Compat_AcqMsg_S
- type DMX_Compat_GetDataFlag_S
- type DMX_Compat_REC_DATA_INDEX_S
- type DMX_Compat_Rec_ProcessDataIndex_S
- type DMX_Compat_RelMsg_S
- type DMX_Compat_SelectDataFlag_S
- type DMX_DATA_BUF_S
- type DMX_FilterAttach_S
- type DMX_FilterChannelIDGet_S
- type DMX_FilterDetach_S
- type DMX_FilterGet_S
- type DMX_FilterSet_S
- type DMX_FreeChanGet_S
- type DMX_FreeFilterGet_S
- type DMX_GetChan_Attr_S
- type DMX_GetDataFlag_S
- type DMX_IDX_DATA_S
- type DMX_MMZ_BUF_S
- type DMX_NewFilter_S
- type DMX_NewPcr_S
- type DMX_PCRSYNC_S
- type DMX_PORT_MODE_E
- type DMX_PcrPidGet_S
- type DMX_PcrPidSet_S
- type DMX_PcrScrGet_S
- type DMX_PcrValGet_S
- type DMX_PesBufAttach_S
- type DMX_PesBufGet_S
- type DMX_PesBufStaGet_S
- type DMX_PoolBuf_Attr_S
- type DMX_PortPacketNum_S
- type DMX_Port_Attach_S
- type DMX_Port_GetAttr_S
- type DMX_Port_GetId_S
- type DMX_Port_SetAttr_S
- type DMX_Rec_AcquireData_S
- type DMX_Rec_AcquireIndex_S
- type DMX_Rec_AcquireScd_S
- type DMX_Rec_AddPid_S
- type DMX_Rec_BufStatus_S
- type DMX_Rec_CreateChan_S
- type DMX_Rec_DelPid_S
- type DMX_Rec_ExcludePid_S
- type DMX_Rec_ProcessDataIndex_S
- type DMX_Rec_ReleaseData_S
- type DMX_Rec_ReleaseScd_S
- type DMX_RelMsg_S
- type DMX_ScrambledFlagGet_S
- type DMX_SelectDataFlag_S
- type DMX_SetChan_Attr_S
- type DMX_SetChan_CC_REPEAT_S
- type DMX_Stream_S
- type DMX_TSO_Port_Attr_S
- type DMX_Tag_GetAttr_S
- type DMX_Tag_SetAttr_S
- type DMX_TsBufGet_S
- type DMX_TsBufInit_S
- type DMX_TsBufPush_S
- type DMX_TsBufPut_S
- type DMX_TsBufRel_S
- type DMX_TsBufStaGet_S
- type DMX_UserMsg_S
- type HI_BOOL
- type HI_CHAR
- type HI_CHIP_CAP_E
- type HI_CHIP_PACKAGE_TYPE_E
- type HI_CHIP_TYPE_E
- type HI_CHIP_VERSION_E
- type HI_DOUBLE
- type HI_DRV_DMX_BUF_STATUS_S
- type HI_FLOAT
- type HI_HANDLE
- type HI_LAYER_ZORDER_E
- type HI_LENGTH_T
- type HI_MMZ_BUF_S
- type HI_MPI_DMX_BUF_STATUS_S
- type HI_MPI_DMX_PORT_E
- type HI_MPI_RMX_ATTR_S
- type HI_MPI_RMX_PUMP_ATTR_S
- type HI_MPI_RMX_PUMP_TYPE_E
- type HI_PCHAR
- type HI_PHYS_ADDR_T
- type HI_PROC_CMD_FN
- type HI_PROC_ENTRY_S
- type HI_PROC_SHOW_BUFFER_S
- type HI_PROC_SHOW_FN
- type HI_RECT_S
- type HI_S16
- type HI_S32
- type HI_S64
- type HI_S8
- type HI_SIZE_T
- type HI_SLONG
- type HI_SYS_CHIP_ATTR_S
- type HI_SYS_CONF_S
- type HI_SYS_MEM_CONFIG_S
- type HI_SYS_VERSION_S
- type HI_U16
- type HI_U32
- type HI_U64
- type HI_U8
- type HI_UCHAR
- type HI_ULONG
- type HI_UNF_DMX_CAPABILITY_S
- type HI_UNF_DMX_CB_CONTEXT_TYPE_E
- type HI_UNF_DMX_CB_DESC_S
- type HI_UNF_DMX_CHAN_ATTR_S
- type HI_UNF_DMX_CHAN_BUF_CB_FUNC
- type HI_UNF_DMX_CHAN_CC_REPEAT_MODE_E
- type HI_UNF_DMX_CHAN_CC_REPEAT_SET_S
- type HI_UNF_DMX_CHAN_CRC_MODE_E
- type HI_UNF_DMX_CHAN_OUTPUT_MODE_E
- type HI_UNF_DMX_CHAN_STATUS_E
- type HI_UNF_DMX_CHAN_STATUS_S
- type HI_UNF_DMX_CHAN_TYPE_E
- type HI_UNF_DMX_DATA_S
- type HI_UNF_DMX_DATA_TYPE_E
- type HI_UNF_DMX_FILTER_ATTR_S
- type HI_UNF_DMX_INVOKE_TYPE_E
- type HI_UNF_DMX_PORT_ATTR_S
- type HI_UNF_DMX_PORT_E
- type HI_UNF_DMX_PORT_MODE_E
- type HI_UNF_DMX_PORT_PACKETNUM_S
- type HI_UNF_DMX_PORT_TYPE_E
- type HI_UNF_DMX_PUSI_SET_S
- type HI_UNF_DMX_RECBUF_STATUS_S
- type HI_UNF_DMX_REC_ATTR_S
- type HI_UNF_DMX_REC_DATA_INDEX_S
- type HI_UNF_DMX_REC_DATA_S
- type HI_UNF_DMX_REC_INDEX_S
- type HI_UNF_DMX_REC_INDEX_TYPE_E
- type HI_UNF_DMX_REC_TYPE_E
- type HI_UNF_DMX_SCRAMBLED_FLAG_E
- type HI_UNF_DMX_SECURE_MODE_E
- type HI_UNF_DMX_TAG_ATTR_S
- type HI_UNF_DMX_TAG_SYNC_MODE_E
- type HI_UNF_DMX_TEI_SET_S
- type HI_UNF_DMX_TSBUF_STATUS_S
- type HI_UNF_DMX_TSI_ATTACH_TSO_S
- type HI_UNF_DMX_TSO_CLK_E
- type HI_UNF_DMX_TSO_CLK_MODE_E
- type HI_UNF_DMX_TSO_PORT_ATTR_S
- type HI_UNF_DMX_TSO_PORT_E
- type HI_UNF_DMX_TSO_SERIAL_BIT_E
- type HI_UNF_DMX_TSO_VALID_MODE_E
- type HI_UNF_IR_CODE_E
- type HI_UNF_IR_PROTOCOL_E
- type HI_UNF_KEY_STATUS_E
- type HI_UNF_SCI_LEVEL_E
- type HI_UNF_SCI_MODE_E
- type HI_UNF_SCI_PARAMS_S
- type HI_UNF_SCI_PORT_E
- type HI_UNF_SCI_PROTOCOL_E
- type HI_UNF_SCI_STATUS_E
- type HI_UNF_VCODEC_TYPE_E
- type HI_UNF_VIDEO_FRAME_TYPE_E
- type HI_VIRT_ADDR_T
- type HI_VOID
- type HiDevice
- type IOC_MODULE_CMD_E
- type KeyAttr
- type MODULE_ALLOC_S
- type MODULE_INFO_S
- type MODULE_MEM_INFO_S
- type RMX_Add_Pump_S
- type RMX_Attr_S
- type RMX_Create_S
- type RMX_Pump_Attr_S
- type SCI_ADD_GUARD_S
- type SCI_ATR_COMPAT_S
- type SCI_ATR_S
- type SCI_BLOCKTIMEOUT_S
- type SCI_CHARTIMEOUT_S
- type SCI_DATA_COMPAT_S
- type SCI_DATA_S
- type SCI_DEV_STATE_S
- type SCI_EXT_BAUD_S
- type SCI_IO_E
- type SCI_IO_OUTPUTTYPE_S
- type SCI_LEVEL_S
- type SCI_OPEN_S
- type SCI_PPS_S
- type SCI_RESET_S
- type SCI_STATUS_S
- type SCI_TXRETRY_S
Constants ¶
const ( HI_UNF_DMX_TSO_SERIAL_BIT_0 HI_UNF_DMX_TSO_SERIAL_BIT_E = 0x0 /* Serial output data using data[0] as signal line */ HI_UNF_DMX_TSO_SERIAL_BIT_7 = 0x7 /* Serial output data using data[7] as signal line */ HI_UNF_DMX_TSO_SERIAL_BIT_BUTT = 0x8 )
const ( HI_UNF_DMX_CHAN_CC_REPEAT_MODE_RSV HI_UNF_DMX_CHAN_CC_REPEAT_MODE_E = 0x0 /* Receive CC repeat ts packet */ HI_UNF_DMX_CHAN_CC_REPEAT_MODE_DROP = 0x1 /* Drop CC repeat ts packet */ HI_UNF_DMX_CHAN_CC_REPEAT_MODE_BUTT = -1 )
const ( HI_SUCCESS HI_U32 = (0) HI_FAILURE HI_S32 = (-1) HI_INVALID_HANDLE HI_U32 = (0xffffffff) HI_INVALID_PTS HI_U32 = (0xffffffff) HI_INVALID_TIME HI_U32 = (0xffffffff) HI_ERR_DISP_DEV_NOT_EXIST HI_U32 = (0x80100001) HI_ERR_DISP_NOT_DEV_FILE HI_U32 = (0x80100002) HI_ERR_DISP_DEV_OPEN_ERR HI_U32 = (0x80100003) HI_ERR_DISP_DEV_CLOSE_ERR HI_U32 = (0x80100004) HI_ERR_DISP_NULL_PTR HI_U32 = (0x80100005) HI_ERR_DISP_NO_INIT HI_U32 = (0x80100006) HI_ERR_DISP_INVALID_PARA HI_U32 = (0x80100007) HI_ERR_DISP_CREATE_ERR HI_U32 = (0x80100008) HI_ERR_DISP_DESTROY_ERR HI_U32 = (0x80100009) HI_ERR_DISP_NOT_EXIST HI_U32 = (0x8010000A) HI_ERR_DISP_INVALID_OPT HI_U32 = (0x8010000B) HI_ERR_DISP_NOT_SUPPORT_FMT HI_U32 = (0x8010000C) HI_ERR_DISP_NOT_OPEN HI_U32 = (0x8010000D) HI_ERR_DISP_SRC_UNAVAILABLE HI_U32 = (0x8010000E) HI_ERR_DISP_NOT_SUPPORT HI_U32 = (0x8010000F) HI_ERR_DISP_MALLOC_FAILED HI_U32 = (0x80100010) HI_ERR_DISP_UNKNOWN HI_U32 = (0x801000FF) HI_ERR_DISP_TIMEOUT HI_U32 = (0x801000F1) HI_ERR_DISP_MALLOC_MAP_ERR HI_U32 = (0x801000F2) HI_ERR_VO_DEV_NOT_EXIST HI_U32 = (0x80110001) HI_ERR_VO_NOT_DEV_FILE HI_U32 = (0x80110002) HI_ERR_VO_DEV_OPEN_ERR HI_U32 = (0x80110003) HI_ERR_VO_DEV_CLOSE_ERR HI_U32 = (0x80110004) HI_ERR_VO_NULL_PTR HI_U32 = (0x80110005) HI_ERR_VO_NO_INIT HI_U32 = (0x80110006) HI_ERR_VO_INVALID_PARA HI_U32 = (0x80110007) HI_ERR_VO_CREATE_ERR HI_U32 = (0x80110008) HI_ERR_VO_DESTROY_ERR HI_U32 = (0x80110009) HI_ERR_VO_NOT_EXIST HI_U32 = (0x80110010) HI_ERR_VO_INVALID_OPT HI_U32 = (0x80110030) HI_ERR_VO_WIN_NOT_EXIST HI_U32 = (0x80110040) HI_ERR_VO_WIN_NOT_ENABLE HI_U32 = (0x80110041) HI_ERR_VO_WIN_UNSUPPORT HI_U32 = (0x80110042) HI_ERR_VO_TIMEOUT HI_U32 = (0x80110043) HI_ERR_VO_OPERATION_DENIED HI_U32 = (0x80110044) HI_ERR_VO_SLAVE_WIN_LOST HI_U32 = (0x80110045) HI_ERR_VO_FRAME_INFO_ERROR HI_U32 = (0x80110046) HI_ERR_VO_FRAME_RELEASE_FAILED HI_U32 = (0x80110047) HI_ERR_VO_NO_FRAME_TO_RELEASE HI_U32 = (0x80110048) HI_ERR_VO_ADD_PROC_ERR HI_U32 = (0x80110049) HI_ERR_VO_MALLOC_FAILED HI_U32 = (0x80110050) HI_ERR_VO_DEPEND_DEVICE_NOT_READY HI_U32 = (0x80110051) HI_ERR_VO_BUFQUE_FULL HI_U32 = (0x80110052) HI_ERR_VO_BUFQUE_EMPTY HI_U32 = (0x80110053) HI_ERR_VO_NO_SOURCE HI_U32 = (0x80110054) HI_ERR_VDEC_NOT_OPEN HI_U32 = (0x80120001) HI_ERR_VDEC_INVALID_PARA HI_U32 = (0x80120002) HI_ERR_VDEC_NULL_PTR HI_U32 = (0x80120003) HI_ERR_VDEC_NOT_SUPPORT HI_U32 = (0x80120004) HI_ERR_VDEC_TIMEOUT HI_U32 = (0x80120005) HI_ERR_VDEC_MALLOC_FAILED HI_U32 = (0x80120044) HI_ERR_VDEC_CREATECH_FAILED HI_U32 = (0x80120047) HI_ERR_VDEC_DESTROYCH_FAILED HI_U32 = (0x80120048) HI_ERR_VDEC_INVALID_CHANID HI_U32 = (0x80120049) HI_ERR_VDEC_RESETCH_FAILED HI_U32 = (0x80120050) HI_ERR_VDEC_SETATTR_FAILED HI_U32 = (0x80120051) HI_ERR_VDEC_GETATTR_FAILED HI_U32 = (0x80120052) HI_ERR_VDEC_SENDSTREAM_FAILED HI_U32 = (0x80120053) HI_ERR_VDEC_RECEIVE_FAILED HI_U32 = (0x80120054) HI_ERR_VDEC_DISCARD_PRIDATA HI_U32 = (0x80120055) HI_ERR_VDEC_RELEASEFRAME_FAILED HI_U32 = (0x80120056) HI_ERR_VDEC_RELEASEPRI_FAILED HI_U32 = (0x80120057) HI_ERR_VDEC_NOT_INIT HI_U32 = (0x80120059) HI_ERR_VDEC_USERCOPY_ERR HI_U32 = (0x8012005A) HI_ERR_VDEC_LIST_EMPTY HI_U32 = (0x8012005B) HI_ERR_VDEC_INVALID_STATE HI_U32 = (0x8012005C) HI_ERR_VDEC_NOT_ENABLE HI_U32 = (0x80120060) HI_ERR_VDEC_BUFFER_NOT_ATTACH HI_U32 = (0x80120061) HI_ERR_VDEC_BUFFER_REQUIRE_INVALID HI_U32 = (0x80120062) HI_ERR_VDEC_BUFFER_ATTACHED HI_U32 = (0x80120063) HI_ERR_VDEC_BUFFER_FULL HI_U32 = (0x80120064) HI_ERR_AO_NOT_INIT HI_U32 = (0x80130001) HI_ERR_AO_INVALID_PARA HI_U32 = (0x80130002) HI_ERR_AO_NULL_PTR HI_U32 = (0x80130003) HI_ERR_AO_INVALID_ID HI_U32 = (0x80130004) HI_ERR_AO_USED HI_U32 = (0x80130005) HI_ERR_AO_NOTSUPPORT HI_U32 = (0x80130006) HI_ERR_AO_USERCOPY_ERR HI_U32 = (0x80130007) HI_ERR_AO_SOUND_NOT_OPEN HI_U32 = (0x80130008) HI_ERR_AO_DEV_NOT_OPEN HI_U32 = (0x80130041) HI_ERR_AO_CREATE_FAIL HI_U32 = (0x80130042) HI_ERR_AO_OUT_BUF_FULL HI_U32 = (0x80130046) HI_ERR_AO_INVALID_OUTFRAME HI_U32 = (0x80130047) HI_ERR_AO_DATASIZE_EXCEED HI_U32 = (0x80130048) HI_ERR_AO_INVALID_INFRAME HI_U32 = (0x80130049) HI_ERR_AO_INBUF_EMPTY HI_U32 = (0x8013004a) HI_ERR_AO_INVALID_PORT HI_U32 = (0x8013004c) HI_ERR_AO_SENDMUTE HI_U32 = (0x8013004d) HI_ERR_AO_VIRTUALBUF_EMPTY HI_U32 = (0x8013004e) HI_ERR_AO_PAUSE_STATE HI_U32 = (0x8013004f) HI_ERR_AO_OUTPORT_NOT_ATTATCH HI_U32 = (0x80130050) HI_ERR_AO_CAST_TIMEOUT HI_U32 = (0x80130051) HI_ERR_ADEC_DEV_NOT_OPEN HI_U32 = (0x80140001) HI_ERR_ADEC_INVALID_PARA HI_U32 = (0x80140002) HI_ERR_ADEC_NULL_PTR HI_U32 = (0x80140003) HI_ERR_ADEC_IN_BUF_FULL HI_U32 = (0x80140004) HI_ERR_ADEC_OUT_BUF_EMPTY HI_U32 = (0x80140005) HI_ERR_ADEC_OUT_VOLUME HI_U32 = (0x80140006) HI_ERR_ADEC_IN_PTSBUF_FULL HI_U32 = (0x80140007) HI_ERR_DMX_NOT_INIT HI_U32 = (0x80150001) HI_ERR_DMX_INVALID_PARA HI_U32 = (0x80150002) HI_ERR_DMX_NULL_PTR HI_U32 = (0x80150003) HI_ERR_DMX_NOT_SUPPORT HI_U32 = (0x80150004) HI_ERR_DMX_TIMEOUT HI_U32 = (0x80150005) HI_ERR_DMX_ALLOC_MEM_FAILED HI_U32 = (0x80150006) HI_ERR_DMX_BUSY HI_U32 = (0x80150007) HI_ERR_DMX_NOATTACH_PORT HI_U32 = (0x80150008) HI_ERR_DMX_ATTACHED_PORT HI_U32 = (0x80150009) HI_ERR_DMX_RECREAT_TSBUFFER HI_U32 = (0x8015000a) HI_ERR_DMX_UNMATCH_CHAN HI_U32 = (0x8015000b) HI_ERR_DMX_NOFREE_CHAN HI_U32 = (0x8015000c) HI_ERR_DMX_OPENING_CHAN HI_U32 = (0x8015000d) HI_ERR_DMX_NOT_OPEN_CHAN HI_U32 = (0x8015000e) HI_ERR_DMX_ATTACHED_FILTER HI_U32 = (0x8015000f) HI_ERR_DMX_NOATTACH_FILTER HI_U32 = (0x80150010) HI_ERR_DMX_UNMATCH_FILTER HI_U32 = (0x80150011) HI_ERR_DMX_NOFREE_FILTER HI_U32 = (0x80150012) HI_ERR_DMX_NOATTACH_KEY HI_U32 = (0x80150013) HI_ERR_DMX_UNMATCH_KEY HI_U32 = (0x80150014) HI_ERR_DMX_NOFREE_KEY HI_U32 = (0x80150015) HI_ERR_DMX_ATTACHED_KEY HI_U32 = (0x80150016) HI_ERR_DMX_NOAVAILABLE_BUF HI_U32 = (0x80150017) HI_ERR_DMX_NOAVAILABLE_DATA HI_U32 = (0x80150018) HI_ERR_DMX_REACQUIRE_BUF HI_U32 = (0x80150019) HI_ERR_DMX_OCCUPIED_PID HI_U32 = (0x80150020) HI_ERR_DMX_MMAP_FAILED HI_U32 = (0x80150021) HI_ERR_DMX_MUNMAP_FAILED HI_U32 = (0x80150022) HI_ERR_DMX_EMPTY_BUFFER HI_U32 = (0x80150023) HI_ERR_DMX_OVERFLOW_BUFFER HI_U32 = (0x80150024) HI_ERR_DMX_NOT_START_REC_CHAN HI_U32 = (0x80150030) HI_ERR_DMX_STARTING_REC_CHAN HI_U32 = (0x80150031) HI_ERR_DMX_NOAVAILABLE_EXCLUDEPID HI_U32 = (0x80150032) HI_ERR_DMX_NOAVAILABLE_TAG_PORT HI_U32 = (0x80150033) HI_ERR_NOT_SUPPORT_TAGDEAL HI_U32 = (0x80150034) HI_ERR_DMX_REC_BUFNOTMATCH HI_U32 = (0x80150035) HI_ERR_DMX_INVALID_REC_CHAN HI_U32 = (0x80150036) HI_ERR_DMX_BUSY_CHAN HI_U32 = (0x80150037) HI_ERR_DMX_BUSY_FILTER HI_U32 = (0x80150038) HI_ERR_DMX_BUSY_KEY HI_U32 = (0x80150039) HI_ERR_DMX_BUSY_REC HI_U32 = (0x8015003A) HI_ERR_VI_NO_INIT HI_U32 = (0x801A0001) HI_ERR_VI_INVALID_PARA HI_U32 = (0x801A0002) HI_ERR_VI_NULL_PTR HI_U32 = (0x801A0003) HI_ERR_VI_INVALID_CHNID HI_U32 = (0x801A0004) HI_ERR_VI_DEV_OPENED HI_U32 = (0x801A0005) HI_ERR_VI_DEV_NOT_EXIST HI_U32 = (0x801A0006) HI_ERR_VI_NOT_DEV_FILE HI_U32 = (0x801A0007) HI_ERR_VI_NO_CHN_LEFT HI_U32 = (0x801A0008) HI_ERR_VI_BUSY HI_U32 = (0x801A0009) HI_ERR_VI_CHN_NOT_EXIST HI_U32 = (0x801A000A) HI_ERR_VI_CHN_INVALID_OPT HI_U32 = (0x801A000B) HI_ERR_VI_CHN_INVALID_STAT HI_U32 = (0x801A000C) HI_ERR_VI_CHN_INIT_BUF_ERR HI_U32 = (0x801A000D) HI_ERR_VI_BUF_EMPTY HI_U32 = (0x801A000E) HI_ERR_VI_BUF_FULL HI_U32 = (0x801A000F) HI_ERR_VI_NOT_SUPPORT HI_U32 = (0x801A0010) HI_ERR_AI_NOT_INIT HI_U32 = (0x801B0001) HI_ERR_AI_INVALID_PARA HI_U32 = (0x801B0002) HI_ERR_AI_NULL_PTR HI_U32 = (0x801B0003) HI_ERR_AI_INVALID_ID HI_U32 = (0x801B0004) HI_ERR_AI_DEV_OPENED HI_U32 = (0x801B0005) HI_ERR_AI_NOTSUPPORT HI_U32 = (0x801B0006) HI_ERR_AI_USERCOPY HI_U32 = (0x801B0007) HI_ERR_AI_BUFEMPTY HI_U32 = (0x801B0008) HI_ERR_AENC_DEV_NOT_OPEN HI_U32 = (0x801C0001) HI_ERR_AENC_INVALID_PARA HI_U32 = (0x801C0002) HI_ERR_AENC_NULL_PTR HI_U32 = (0x801C0003) HI_ERR_AENC_OUT_BUF_FULL HI_U32 = (0x801C0006) HI_ERR_AENC_INVALID_OUTFRAME HI_U32 = (0x801C0007) HI_ERR_AENC_DATASIZE_EXCEED HI_U32 = (0x801C0008) HI_ERR_AENC_CREATECH_FAIL HI_U32 = (0x801C0009) HI_ERR_AENC_IN_BUF_FULL HI_U32 = (0x801C000a) HI_ERR_AENC_CH_NOT_OPEN HI_U32 = (0x801C000b) HI_ERR_AENC_OUT_BUF_EMPTY HI_U32 = (0x801C000c) HI_ERR_AENC_OUT_BUF_BAD HI_U32 = (0x801C000d) HI_ERR_AENC_IN_BUF_UNEMPTY HI_U32 = (0x801C000e) HI_ERR_AENC_CH_NOT_SUPPORT HI_U32 = (0x801C000f) HI_ERR_VENC_NO_INIT HI_U32 = (0x801D0001) HI_ERR_VENC_INVALID_PARA HI_U32 = (0x801D0002) HI_ERR_VENC_NULL_PTR HI_U32 = (0x801D0003) HI_ERR_VENC_INVALID_CHNID HI_U32 = (0x801D0004) HI_ERR_VENC_DEV_OPENED HI_U32 = (0x801D0005) HI_ERR_VENC_DEV_NOT_EXIST HI_U32 = (0x801D0006) HI_ERR_VENC_NOT_DEV_FILE HI_U32 = (0x801D0007) HI_ERR_VENC_CREATE_ERR HI_U32 = (0x801D0008) HI_ERR_VENC_DESTROY_ERR HI_U32 = (0x801D0009) HI_ERR_VENC_CHN_NOT_EXIST HI_U32 = (0x801D000A) HI_ERR_VENC_CHN_INVALID_STAT HI_U32 = (0x801D000B) HI_ERR_VENC_CHN_NO_ATTACH HI_U32 = (0x801D000C) HI_ERR_VENC_BUF_EMPTY HI_U32 = (0x801D000D) HI_ERR_VENC_CHN_RELEASE_ERR HI_U32 = (0x801D000E) HI_ERR_VENC_NOT_SUPPORT HI_U32 = (0x801D000F) HI_ERR_SIO_AI_INVALID_DEVID HI_U32 = (0x801E0001) HI_ERR_SIO_AI_INVALID_CHNID HI_U32 = (0x801E0002) HI_ERR_SIO_AI_ILLEGAL_PARAM HI_U32 = (0x801E0003) HI_ERR_SIO_AI_NULL_PTR HI_U32 = (0x801E0004) HI_ERR_SIO_AI_NOT_CONFIG HI_U32 = (0x801E0005) HI_ERR_SIO_AI_NOT_SURPPORT HI_U32 = (0x801E0006) HI_ERR_SIO_AI_NOT_PERM HI_U32 = (0x801E0007) HI_ERR_SIO_AI_NOT_ENABLED HI_U32 = (0x801E0008) HI_ERR_SIO_AI_NOMEM HI_U32 = (0x801E0009) HI_ERR_SIO_AI_NOBUF HI_U32 = (0x801E000A) HI_ERR_SIO_AI_BUF_EMPTY HI_U32 = (0x801E000B) HI_ERR_SIO_AI_BUF_FULL HI_U32 = (0x801E000C) HI_ERR_SIO_AI_SYS_NOTREADY HI_U32 = (0x801E000D) HI_ERR_SIO_AI_BUSY HI_U32 = (0x801E000E) HI_ERR_SIO_AO_INVALID_DEVID HI_U32 = (0x801F0001) HI_ERR_SIO_AO_INVALID_CHNID HI_U32 = (0x801F0002) HI_ERR_SIO_AO_ILLEGAL_PARAM HI_U32 = (0x801F0003) HI_ERR_SIO_AO_NULL_PTR HI_U32 = (0x801F0004) HI_ERR_SIO_AO_NOT_CONFIG HI_U32 = (0x801F0005) HI_ERR_SIO_AO_NOT_SURPPORT HI_U32 = (0x801F0006) HI_ERR_SIO_AO_NOT_PERM HI_U32 = (0x801F0007) HI_ERR_SIO_AO_NOT_ENABLED HI_U32 = (0x801F0008) HI_ERR_SIO_AO_NOMEM HI_U32 = (0x801F0009) HI_ERR_SIO_AO_NOBUF HI_U32 = (0x801F000A) HI_ERR_SIO_AO_BUF_EMPTY HI_U32 = (0x801F000B) HI_ERR_SIO_AO_BUF_FULL HI_U32 = (0x801F000C) HI_ERR_SIO_AO_SYS_NOTREADY HI_U32 = (0x801F000D) HI_ERR_SIO_AO_BUSY HI_U32 = (0x801F000E) HI_ERR_AFLT_NOT_INIT HI_U32 = (0x80200001) HI_ERR_AFLT_INVALID_PARA HI_U32 = (0x80200002) HI_ERR_AFLT_NULL_PTR HI_U32 = (0x80200003) HI_ERR_AFLT_INVALID_HANDLE HI_U32 = (0x80200004) HI_ERR_AFLT_CHN_NOT_OPEN HI_U32 = (0x80200005) HI_ERR_AFLT_INBUF_FULL HI_U32 = (0x80200006) HI_ERR_AFLT_OUTBUF_EMPTY HI_U32 = (0x80200007) HI_ERR_AFLT_BUFEMPTY HI_U32 = (0x80200008) HI_ERR_HDMI_NOT_INIT HI_U32 = (0x80210001) HI_ERR_HDMI_INVALID_PARA HI_U32 = (0x80210002) HI_ERR_HDMI_NUL_PTR HI_U32 = (0x80210003) HI_ERR_HDMI_DEV_NOT_OPEN HI_U32 = (0x80210004) HI_ERR_HDMI_DEV_NOT_CONNECT HI_U32 = (0x80210005) HI_ERR_HDMI_READ_SINK_FAILED HI_U32 = (0x80210006) HI_ERR_HDMI_INIT_ALREADY HI_U32 = (0x80210007) HI_ERR_HDMI_CALLBACK_ALREADY HI_U32 = (0x80210008) HI_ERR_HDMI_INVALID_CALLBACK HI_U32 = (0x80210009) HI_ERR_HDMI_FEATURE_NO_USPPORT HI_U32 = (0x8021000a) HI_ERR_HDMI_BUS_BUSY HI_U32 = (0x8021000b) HI_ERR_PVR_NOT_INIT HI_U32 = (0x80300001) HI_ERR_PVR_INVALID_PARA HI_U32 = (0x80300002) HI_ERR_PVR_NUL_PTR HI_U32 = (0x80300003) HI_ERR_PVR_CHN_NOT_INIT HI_U32 = (0x80300004) HI_ERR_PVR_INVALID_CHNID HI_U32 = (0x80300005) HI_ERR_PVR_NO_CHN_LEFT HI_U32 = (0x80300006) HI_ERR_PVR_ALREADY HI_U32 = (0x80300007) HI_ERR_PVR_BUSY HI_U32 = (0x80300008) HI_ERR_PVR_NO_MEM HI_U32 = (0x80300009) HI_ERR_PVR_NOT_SUPPORT HI_U32 = (0x8030000A) HI_ERR_PVR_RETRY HI_U32 = (0x8030000B) HI_ERR_PVR_FILE_EXIST HI_U32 = (0x80300011) HI_ERR_PVR_FILE_NOT_EXIST HI_U32 = (0x80300012) HI_ERR_PVR_FILE_CANT_OPEN HI_U32 = (0x80300013) HI_ERR_PVR_FILE_CANT_CLOSE HI_U32 = (0x80300014) HI_ERR_PVR_FILE_CANT_SEEK HI_U32 = (0x80300015) HI_ERR_PVR_FILE_CANT_WRITE HI_U32 = (0x80300016) HI_ERR_PVR_FILE_CANT_READ HI_U32 = (0x80300017) HI_ERR_PVR_FILE_INVALID_FNAME HI_U32 = (0x80300018) HI_ERR_PVR_FILE_TILL_START HI_U32 = (0x80300019) HI_ERR_PVR_FILE_TILL_END HI_U32 = (0x8030001A) HI_ERR_PVR_FILE_DISC_FULL HI_U32 = (0x8030001B) HI_ERR_PVR_REC_INVALID_STATE HI_U32 = (0x80300021) HI_ERR_PVR_REC_INVALID_DMXID HI_U32 = (0x80300022) HI_ERR_PVR_REC_INVALID_FSIZE HI_U32 = (0x80300023) HI_ERR_PVR_REC_INVALID_UDSIZE HI_U32 = (0x80300024) HI_ERR_PVR_PLAY_INVALID_STATE HI_U32 = (0x80300031) HI_ERR_PVR_PLAY_INVALID_DMXID HI_U32 = (0x80300032) HI_ERR_PVR_PLAY_INVALID_TSBUFFER HI_U32 = (0x80300033) HI_ERR_PVR_PLAY_INVALID_PACKETBUFFER HI_U32 = (0x80300034) HI_ERR_PVR_PLAY_INDEX_BEYOND_TS HI_U32 = (0x80300035) HI_ERR_PVR_SEC_INIT_FAILED HI_U32 = (0x80300036) HI_ERR_PVR_SEC_RUNTIME_ERROR HI_U32 = (0x80300037) HI_ERR_PVR_INDEX_CANT_MKIDX HI_U32 = (0x80300041) HI_ERR_PVR_INDEX_FORMAT_ERR HI_U32 = (0x80300042) HI_ERR_PVR_INDEX_DATA_ERR HI_U32 = (0x80300043) HI_ERR_PVR_INDEX_INVALID_ENTRY HI_U32 = (0x80300044) HI_ERR_PVR_INTF_EVENT_INVAL HI_U32 = (0x80300051) HI_ERR_PVR_INTF_EVENT_NOREG HI_U32 = (0x80300052) HI_ERR_AVPLAY_DEV_NOT_EXIST HI_U32 = (0x80310001) HI_ERR_AVPLAY_NOT_DEV_FILE HI_U32 = (0x80310002) HI_ERR_AVPLAY_DEV_OPEN_ERR HI_U32 = (0x80310003) HI_ERR_AVPLAY_DEV_CLOSE_ERR HI_U32 = (0x80310004) HI_ERR_AVPLAY_NULL_PTR HI_U32 = (0x80310005) HI_ERR_AVPLAY_DEV_NO_INIT HI_U32 = (0x80310006) HI_ERR_AVPLAY_INVALID_PARA HI_U32 = (0x80310007) HI_ERR_AVPLAY_CREATE_ERR HI_U32 = (0x80310008) HI_ERR_AVPLAY_DESTROY_ERR HI_U32 = (0x80310009) HI_ERR_AVPLAY_INVALID_OPT HI_U32 = (0x8031000A) HI_ERR_AVPLAY_NOT_SUPPORT HI_U32 = (0x8031000B) HI_ERR_SYNC_DEV_NOT_EXIST HI_U32 = (0x80320001) HI_ERR_SYNC_NOT_DEV_FILE HI_U32 = (0x80320002) HI_ERR_SYNC_DEV_OPEN_ERR HI_U32 = (0x80320003) HI_ERR_SYNC_DEV_CLOSE_ERR HI_U32 = (0x80320004) HI_ERR_SYNC_NULL_PTR HI_U32 = (0x80320005) HI_ERR_SYNC_DEV_NO_INIT HI_U32 = (0x80320006) HI_ERR_SYNC_INVALID_PARA HI_U32 = (0x80320007) HI_ERR_SYNC_CREATE_ERR HI_U32 = (0x80320008) HI_ERR_SYNC_DESTROY_ERR HI_U32 = (0x80320009) HI_ERR_SYNC_INVALID_OPT HI_U32 = (0x8032000A) HI_ERR_MCE_DEV_NOT_EXIST HI_U32 = (0x80330001) HI_ERR_MCE_NOT_DEVICE HI_U32 = (0x80330002) HI_ERR_MCE_DEV_OPEN_ERR HI_U32 = (0x80330003) HI_ERR_MCE_DEV_NOT_INIT HI_U32 = (0x80330004) HI_ERR_MCE_PTR_NULL HI_U32 = (0x80330005) HI_ERR_MCE_PARAM_INVALID HI_U32 = (0x80330006) HI_ERR_MCE_GET_MTDINFO_ERR HI_U32 = (0x80330007) HI_ERR_MCE_MTD_OPEN HI_U32 = (0x80330008) HI_ERR_MCE_MTD_CLOSE HI_U32 = (0x80330009) HI_ERR_MCE_MTD_READ HI_U32 = (0x80330010) HI_ERR_MCE_MTD_WRITE HI_U32 = (0x80330011) HI_ERR_MCE_MTD_GETINFO HI_U32 = (0x80330012) HI_ERR_MCE_MTD_ERASE HI_U32 = (0x80330013) HI_ERR_MCE_MEM_ALLC HI_U32 = (0x80330014) HI_ERR_MCE_INVALID_OPT HI_U32 = (0x80330015) HI_ERR_VP_PTR_NULL HI_U32 = (0x80340001) HI_ERR_VP_NOT_INIT HI_U32 = (0x80340002) HI_ERR_VP_DEV_NOT_EXIST HI_U32 = (0x80340003) HI_ERR_VP_NOT_DEV_FILE HI_U32 = (0x80340004) HI_ERR_VP_DEV_OPEN_ERR HI_U32 = (0x80340005) HI_ERR_VP_INVALID_PARA HI_U32 = (0x80340006) HI_ERR_VP_NOT_SUPPORT HI_U32 = (0x80340007) HI_ERR_VP_INVALID_HANDLE HI_U32 = (0x80340008) HI_ERR_VP_HANDLE_NOTEXIST HI_U32 = (0x80340009) HI_ERR_VP_NOT_READY HI_U32 = (0x8034000a) HI_ERR_VP_ILLEGAL_STATE HI_U32 = (0x8034000b) HI_ERR_IR_OPEN_ERR HI_U32 = (0x80410001) HI_ERR_IR_CLOSE_ERR HI_U32 = (0x80410002) HI_ERR_IR_NOT_INIT HI_U32 = (0x80410003) HI_ERR_IR_INVALID_PARA HI_U32 = (0x80410004) HI_ERR_IR_NULL_PTR HI_U32 = (0x80410005) HI_ERR_IR_READ_FAILED HI_U32 = (0x80410006) HI_ERR_IR_ENABLE_FAILED HI_U32 = (0x80410007) HI_ERR_IR_SET_BLOCKTIME_FAILED HI_U32 = (0x80410008) HI_ERR_IR_SET_FETCHMETHOD_FAILED HI_U32 = (0x80410009) HI_ERR_IR_SET_KEYUP_FAILED HI_U32 = (0x8041000A) HI_ERR_IR_SET_REPEAT_FAILED HI_U32 = (0x8041000B) HI_ERR_IR_SET_REPKEYTIMEOUT_FAILED HI_U32 = (0x8041000C) HI_ERR_IR_RESET_FAILED HI_U32 = (0x8041000D) HI_ERR_IR_ENABLE_PROT_FAILED HI_U32 = (0x8041000E) HI_ERR_IR_DISABLE_PROT_FAILED HI_U32 = (0x8041000F) HI_ERR_IR_GET_PROTENABLE_FAILED HI_U32 = (0x80410010) HI_ERR_IR_SETFORMAT_FAILED HI_U32 = (0x80410011) HI_ERR_IR_UNSUPPORT HI_U32 = (0x80410012) HI_ERR_RTC_NOT_INIT HI_U32 = (0x80420001) HI_ERR_RTC_REPEAT_INIT HI_U32 = (0x80420002) HI_ERR_RTC_INVALID_POINT HI_U32 = (0x80420003) HI_ERR_RTC_INVALID_PARA HI_U32 = (0x80420004) HI_ERR_RTC_FAILED_INIT HI_U32 = (0x80420005) HI_ERR_RTC_FAILED_SETTIME HI_U32 = (0x80420006) HI_ERR_RTC_FAILED_GETTIME HI_U32 = (0x80420007) HI_ERR_RTC_FAILED_ALARMENABLE HI_U32 = (0x80420008) HI_ERR_RTC_FAILED_ALARMDISABLE HI_U32 = (0x80420009) HI_ERR_RTC_FAILED_SETALARM HI_U32 = (0x8042000A) HI_ERR_RTC_FAILED_GETALARM HI_U32 = (0x8042000B) HI_ERR_WDG_NOT_INIT HI_U32 = (0x80430001) HI_ERR_WDG_REPEAT_INIT HI_U32 = (0x80430002) HI_ERR_WDG_INVALID_POINT HI_U32 = (0x80430003) HI_ERR_WDG_INVALID_PARA HI_U32 = (0x80430004) HI_ERR_WDG_FAILED_INIT HI_U32 = (0x80430005) HI_ERR_WDG_FAILED_SETTIMEOUT HI_U32 = (0x80430006) HI_ERR_WDG_FAILED_ENABLE HI_U32 = (0x80430007) HI_ERR_WDG_FAILED_DISABLE HI_U32 = (0x80430008) HI_ERR_WDG_FAILED_CLEARWDG HI_U32 = (0x80430009) HI_ERR_WDG_FAILED_RESET HI_U32 = (0x8043000A) HI_ERR_WDG_FAILED_RESMODE HI_U32 = (0x8043000B) HI_ERR_WDG_NOT_SUPPORT HI_U32 = (0x8043000C) HI_ERR_WDG_FAILED_GETTIMEOUT HI_U32 = (0x8043000D) HI_ERR_WDG_FAILED_DEINIT HI_U32 = (0x8043000E) HI_ERR_I2C_OPEN_ERR HI_U32 = (0x80440001) HI_ERR_I2C_CLOSE_ERR HI_U32 = (0x80440002) HI_ERR_I2C_NOT_INIT HI_U32 = (0x80440003) HI_ERR_I2C_INVALID_PARA HI_U32 = (0x80440004) HI_ERR_I2C_NULL_PTR HI_U32 = (0x80440005) HI_ERR_I2C_COPY_DATA_ERR HI_U32 = (0x80440006) HI_ERR_I2C_MALLOC_ERR HI_U32 = (0x80440007) HI_ERR_I2C_WRITE_TIMEOUT HI_U32 = (0x80440008) HI_ERR_I2C_READ_TIMEOUT HI_U32 = (0x80440009) HI_ERR_SCI_OPEN_ERR HI_U32 = (0x80450001) HI_ERR_SCI_CLOSE_ERR HI_U32 = (0x80450002) HI_ERR_SCI_NOT_INIT HI_U32 = (0x80450003) HI_ERR_SCI_INVALID_PARA HI_U32 = (0x80450004) HI_ERR_SCI_NULL_PTR HI_U32 = (0x80450005) HI_ERR_SCI_INVALID_OPT HI_U32 = (0x80450006) HI_ERR_SCI_SEND_ERR HI_U32 = (0x80450007) HI_ERR_SCI_RECEIVE_ERR HI_U32 = (0x80450008) HI_ERR_SCI_NO_ATR HI_U32 = (0x80450009) HI_ERR_SCI_PPS_PTYPE_ERR HI_U32 = (0x8045000A) HI_ERR_SCI_PPS_FACTOR_ERR HI_U32 = (0x8045000B) HI_ERR_SCI_PPS_NOTSUPPORT_ERR HI_U32 = (0x8045000C) HI_ERR_SCI_NOTSUPPORT HI_U32 = (0x8045000D) HI_ERR_ETH_NOT_INIT HI_U32 = (0x80460001) HI_ERR_ETH_REPEAT_INIT HI_U32 = (0x80460002) HI_ERR_ETH_INVALID_POINT HI_U32 = (0x80460003) HI_ERR_ETH_INVALID_PARA HI_U32 = (0x80460004) HI_ERR_ETH_FAILED_INIT HI_U32 = (0x80460005) HI_ERR_GPIO_OPEN_ERR HI_U32 = (0x80470001) HI_ERR_GPIO_CLOSE_ERR HI_U32 = (0x80470002) HI_ERR_GPIO_NOT_INIT HI_U32 = (0x80470003) HI_ERR_GPIO_INVALID_PARA HI_U32 = (0x80470004) HI_ERR_GPIO_NULL_PTR HI_U32 = (0x80470005) HI_ERR_GPIO_INVALID_OPT HI_U32 = (0x80470006) HI_ERR_GPIO_FAILED_SETINT HI_U32 = (0x80470007) HI_ERR_GPIO_FAILED_SETENABLE HI_U32 = (0x80470008) HI_ERR_GPIO_FAILED_GETINT HI_U32 = (0x80470009) HI_ERR_GPIO_GETINT_TIMEOUT HI_U32 = (0x8047000A) HI_ERR_GPIO_INTTYPE_NOT_SUPPORT HI_U32 = (0x8047000B) HI_ERR_GPIO_NOT_SUPPORT HI_U32 = (0x8047000C) HI_ERR_GPIO_FAILED_SETOUTPUTTYPE HI_U32 = (0x8047000D) HI_ERR_GPIO_FAILED_GETOUTPUTTYPE HI_U32 = (0x8047000E) HI_ERR_GPIO_FAILED_SETDIRECT HI_U32 = (0x8047000F) HI_ERR_GPIO_FAILED_GETDIRECT HI_U32 = (0x80470010) HI_ERR_GPIO_FAILED_SETVALUE HI_U32 = (0x80470011) HI_ERR_GPIO_FAILED_GETVALUE HI_U32 = (0x80470012) HI_ERR_DMAC_NOT_INIT HI_U32 = (0x80480001) HI_ERR_DMAC_REPEAT_INIT HI_U32 = (0x80480002) HI_ERR_DMAC_INVALID_POINT HI_U32 = (0x80480003) HI_ERR_DMAC_INVALID_PARA HI_U32 = (0x80480004) HI_ERR_DMAC_FAILED_INIT HI_U32 = (0x80480005) HI_ERR_DMAC_FAILED_GETCHANNEL HI_U32 = (0x80480006) HI_ERR_DMAC_FAILED_MEMTRANS HI_U32 = (0x80480007) HI_ERR_DMAC_FAILED_PERTRANS HI_U32 = (0x80480008) HI_ERR_DMAC_FAILED_GETSTAT HI_U32 = (0x80480009) HI_ERR_DMAC_FAILED_LISTRESET HI_U32 = (0x8048000A) HI_ERR_DMAC_FAILED_ADDLIST HI_U32 = (0x8048000B) HI_ERR_DMAC_FAILED_LISTTRANS HI_U32 = (0x8048000C) HI_ERR_PMOC_NOT_INIT HI_U32 = (0x80490001) HI_ERR_PMOC_REPEAT_INIT HI_U32 = (0x80490002) HI_ERR_PMOC_INVALID_POINT HI_U32 = (0x80490003) HI_ERR_PMOC_INVALID_PARA HI_U32 = (0x80490004) HI_ERR_PMOC_FAILED_INIT HI_U32 = (0x80490005) HI_ERR_PMOC_FAILED_MODE HI_U32 = (0x80490006) HI_ERR_PMOC_FAILED_READMODE HI_U32 = (0x80490007) HI_ERR_PMOC_FAILED_SETWAKEUPVAL HI_U32 = (0x80490008) HI_ERR_PMOC_FAILED_GETWAKEUPVAL HI_U32 = (0x80490009) HI_ERR_PMOC_INVALID_MODE HI_U32 = (0x8049000A) HI_ERR_PMOC_FAILED_STANDBY HI_U32 = (0x8049000B) HI_ERR_PMOC_FAILED_SETDEV HI_U32 = (0x8049000C) HI_ERR_PMOC_FAILED_GETPERIOD HI_U32 = (0x8049000D) HI_ERR_PMOC_FAILED_IRPOWERVAL HI_U32 = (0x8049000E) HI_ERR_PMOC_FAILED_KEYLEDPOWERVAL HI_U32 = (0x8049000F) HI_ERR_PMOC_FAILED_GETWAKEUPMODE HI_U32 = (0x80490010) HI_ERR_PMOC_FAILED_GETTEMPERATURE HI_U32 = (0x80490011) HI_ERR_TUNER_NOT_INIT HI_U32 = (0x804A0001) HI_ERR_TUNER_NOT_OPEN HI_U32 = (0x804A0002) HI_ERR_TUNER_INVALID_POINT HI_U32 = (0x804A0003) HI_ERR_TUNER_INVALID_PARA HI_U32 = (0x804A0004) HI_ERR_TUNER_FAILED_INIT HI_U32 = (0x804A0005) HI_ERR_TUNER_FAILED_CONNECT HI_U32 = (0x804A0006) HI_ERR_TUNER_FAILED_GETSTATUS HI_U32 = (0x804A0007) HI_ERR_TUNER_FAILED_GETSIGNALSTRENGTH HI_U32 = (0x804A0008) HI_ERR_TUNER_FAILED_GETBER HI_U32 = (0x804A0009) HI_ERR_TUNER_FAILED_GETSNR HI_U32 = (0x804A000A) HI_ERR_TUNER_FAILED_SETTSTYPE HI_U32 = (0x804A000B) HI_ERR_TUNER_FAILED_SELECTTUNER HI_U32 = (0x804A000C) HI_ERR_TUNER_FAILED_SELECTI2CCHANNEL HI_U32 = (0x804A000D) HI_ERR_TUNER_FAILED_LOWCONS HI_U32 = (0x804A000E) HI_ERR_TUNER_FAILED_NORMALMODE HI_U32 = (0x804A000F) HI_ERR_TUNER_FAILED_REGRW HI_U32 = (0x804A0010) HI_ERR_TUNER_FAILED_SETTUNER HI_U32 = (0x804A0011) HI_ERR_TUNER_NOT_CONNECT HI_U32 = (0x804A0012) HI_ERR_TUNER_INVALID_PORT HI_U32 = (0x804A0013) HI_ERR_TUNER_FAILED_SETQAMINSIDE HI_U32 = (0x804A0014) HI_ERR_TUNER_FAILED_SELECTSYMBOLRATE HI_U32 = (0x804A0015) HI_ERR_TUNER_FAILED_GETSIGNALQUALITY HI_U32 = (0x804A0016) HI_ERR_TUNER_FAILED_GETSIGNALINFO HI_U32 = (0x804A0017) HI_ERR_TUNER_FAILED_BLINDSCAN HI_U32 = (0x804A0018) HI_ERR_TUNER_FAILED_LNBCTRL HI_U32 = (0x804A0019) HI_ERR_TUNER_FAILED_SWITCH HI_U32 = (0x804A001A) HI_ERR_TUNER_FAILED_DISEQC HI_U32 = (0x804A001B) HI_ERR_TUNER_FAILED_STANDBY HI_U32 = (0x804A001C) HI_ERR_TUNER_FAILED_WAKEUP HI_U32 = (0x804A001D) HI_ERR_TUNER_FAILED_DISABLE HI_U32 = (0x804A001E) HI_ERR_TUNER_FAILED_ENABLE HI_U32 = (0x804A001F) HI_ERR_TUNER_FAILED_SETPLPID HI_U32 = (0x804A0020) HI_ERR_TUNER_FAILED_GETPLPNUM HI_U32 = (0x804A0021) HI_ERR_TUNER_FAILED_GETPLPTYPE HI_U32 = (0x804A0022) HI_ERR_TUNER_FAILED_SETTSOUT HI_U32 = (0x804A0023) HI_ERR_TUNER_FAILED_SETSATATTR HI_U32 = (0x804A0024) HI_ERR_TUNER_FAILED_SAMPLEDATA HI_U32 = (0x804A0025) HI_ERR_TUNER_FAILED_SETTERATTR HI_U32 = (0x804A0026) HI_ERR_TUNER_FAILED_SETSTEP HI_U32 = (0x804A0027) HI_ERR_TUNER_FAILED_GETBANDRANGE HI_U32 = (0x804A0028) HI_ERR_TUNER_FAILED_SETTOPADJUST HI_U32 = (0x804A0029) HI_ERR_TUNER_FAILED_GETBAND HI_U32 = (0x804A002A) HI_ERR_TUNER_FAILED_GETTONE HI_U32 = (0x804A002B) HI_ERR_TUNER_FAILED_GETAGC HI_U32 = (0x804A002C) HI_ERR_TUNER_FAILED_TERSCANTIMEOUT HI_U32 = (0x804A002D) HI_ERR_TUNER_FAILED_ALLOC_MEM HI_U32 = (0x804A002E) HI_ERR_TUNER_FAILED_SETISIID HI_U32 = (0x804A002F) HI_ERR_TUNER_FAILED_GETISIID HI_U32 = (0x804A0030) HI_ERR_TUNER_FAILED_GETTOTALISI HI_U32 = (0x804A0031) HI_ERR_TUNER_FAILED_MONITORISDBTLAYER HI_U32 = (0x804A0032) HI_ERR_KEYLED_NOT_INIT HI_U32 = (0x804B0001) HI_ERR_KEYLED_INVALID_PARA HI_U32 = (0x804B0002) HI_ERR_KEYLED_NULL_PTR HI_U32 = (0x804B0003) HI_ERR_KEYLED_NO_NEW_KEY HI_U32 = (0x804B0004) HI_ERR_KEYLED_TIMEOUT HI_U32 = (0x804B0005) HI_ERR_KEYLED_FAILED_SETMODE HI_U32 = (0x804B0006) HI_ERR_KEYLED_FAILED_DISPLAY HI_U32 = (0x804B0007) HI_ERR_E2PROM_OPEN_ERR HI_U32 = (0x804C0001) HI_ERR_E2PROM_CLOSE_ERR HI_U32 = (0x804C0002) HI_ERR_E2PROM_NOT_INIT HI_U32 = (0x804C0003) HI_ERR_E2PROM_INVALID_PARA HI_U32 = (0x804C0004) HI_ERR_E2PROM_NULL_PTR HI_U32 = (0x804C0005) HI_ERR_E2PROM_COPY_DATA_ERR HI_U32 = (0x804C0006) HI_ERR_E2PROM_MALLOC_ERR HI_U32 = (0x804C0007) HI_ERR_CIPHER_NOT_INIT HI_U32 = (0x804D0001) HI_ERR_CIPHER_INVALID_HANDLE HI_U32 = (0x804D0002) HI_ERR_CIPHER_INVALID_POINT HI_U32 = (0x804D0003) HI_ERR_CIPHER_INVALID_PARA HI_U32 = (0x804D0004) HI_ERR_CIPHER_FAILED_INIT HI_U32 = (0x804D0005) HI_ERR_CIPHER_FAILED_GETHANDLE HI_U32 = (0x804D0006) HI_ERR_CIPHER_FAILED_RELEASEHANDLE HI_U32 = (0x804D0007) HI_ERR_CIPHER_FAILED_CONFIGAES HI_U32 = (0x804D0008) HI_ERR_CIPHER_FAILED_CONFIGDES HI_U32 = (0x804D0009) HI_ERR_CIPHER_FAILED_ENCRYPT HI_U32 = (0x804D000A) HI_ERR_CIPHER_FAILED_DECRYPT HI_U32 = (0x804D000B) HI_ERR_CIPHER_BUSY HI_U32 = (0x804D000C) HI_ERR_CIPHER_NO_AVAILABLE_RNG HI_U32 = (0x804D000D) HI_ERR_CA_OPEN_ERR HI_U32 = (0x804E0001) HI_ERR_CA_CLOSE_ERR HI_U32 = (0x804E0002) HI_ERR_CA_NOT_INIT HI_U32 = (0x804E0003) HI_ERR_CA_COPY_DATA_ERR HI_U32 = (0x804E0004) HI_ERR_CA_INVALID_PARA HI_U32 = (0x804E0005) HI_ERR_CA_WAIT_TIMEOUT HI_U32 = (0x804E0006) HI_ERR_CA_CW_DECRYPT HI_U32 = (0x804E0007) HI_ERR_CA_R2R_DECRYPT HI_U32 = (0x804E0008) HI_ERR_CA_R2R_ENCRYPT HI_U32 = (0x804E0009) HI_ERR_CA_SETPARAM_AGAIN HI_U32 = (0x804E000A) HI_ERR_CA_DBG_INERR HI_U32 = (0x804E000B) HI_ERR_CA_NOT_CONFIG HI_U32 = (0x804E000C) HI_ERR_CA_LPK_DECRYPT HI_U32 = (0x804E000D) HI_ERR_CA_NOT_SUPPORT HI_U32 = (0x804E000E) HI_ERR_CA_SWPK_ENCRYPT HI_U32 = (0x804E000F) HI_ERR_CA_ALREADY_SET HI_U32 = (0x804E0010) HI_ERR_CA_NO_MEMORY HI_U32 = (0x804E0011) HI_ERR_PM_COPY_DATA_ERR HI_U32 = (0x804F0001) HI_ERR_PM_INVALID_PARAM HI_U32 = (0x804F0002) HI_ERR_CI_NOT_INIT HI_U32 = (0x80500001) HI_ERR_CI_OPEN_ERR HI_U32 = (0x80500002) HI_ERR_CI_CLOSE_ERR HI_U32 = (0x80500003) HI_ERR_CI_INVALID_PARA HI_U32 = (0x80500004) HI_ERR_CI_NO_MEMORY HI_U32 = (0x80500005) HI_ERR_CI_TIMEOUT HI_U32 = (0x80500006) HI_ERR_CI_REG_READ_ERR HI_U32 = (0x80500007) HI_ERR_CI_REG_WRITE_ERR HI_U32 = (0x80500008) HI_ERR_CI_IO_READ_ERR HI_U32 = (0x80500009) HI_ERR_CI_IO_WRITE_ERR HI_U32 = (0x8050000A) HI_ERR_CI_ATTR_READ_ERR HI_U32 = (0x8050000B) HI_ERR_CI_ATTR_WRITE_ERR HI_U32 = (0x8050000C) HI_ERR_CI_CANNOT_POWEROFF HI_U32 = (0x8050000D) HI_ERR_CI_PCCD_DEVICE_BUSY HI_U32 = (0x8050000E) HI_ERR_CI_PCCD_CIS_READ HI_U32 = (0x8050000F) HI_ERR_CI_UNSUPPORT HI_U32 = (0x80500010) HI_ERR_CI_UNKONWN HI_U32 = (0x80500011) HI_ERR_CI_DETECT_ERR HI_U32 = (0x80500012) HI_ERR_PWM_DEV_NOT_EXIST HI_U32 = (0x80510001) HI_ERR_PWM_NOT_INIT HI_U32 = (0x80510002) HI_ERR_PWM_OPEN_ERR HI_U32 = (0x80510003) HI_ERR_PWM_CLOSE_ERR HI_U32 = (0x80510004) HI_ERR_PWM_INVALID_PARA HI_U32 = (0x80510005) HI_ERR_PWM_INVALID_OPT HI_U32 = (0x80510006) HI_ERR_PWM_UNSUPPORT HI_U32 = (0x80510007) HI_ERR_PDM_DEV_NOT_EXIST HI_U32 = (0x80520001) HI_ERR_PDM_NOT_DEVICE HI_U32 = (0x80520002) HI_ERR_PDM_DEV_OPEN_ERR HI_U32 = (0x80520003) HI_ERR_PDM_DEV_NOT_INIT HI_U32 = (0x80520004) HI_ERR_PDM_PTR_NULL HI_U32 = (0x80520005) HI_ERR_PDM_PARAM_INVALID HI_U32 = (0x80520006) HI_ERR_PDM_GET_MTDINFO_ERR HI_U32 = (0x80520007) HI_ERR_PDM_MTD_OPEN HI_U32 = (0x80520008) HI_ERR_PDM_MTD_CLOSE HI_U32 = (0x80520009) HI_ERR_PDM_MTD_READ HI_U32 = (0x80520010) HI_ERR_PDM_MTD_WRITE HI_U32 = (0x80520011) HI_ERR_PDM_MTD_GETINFO HI_U32 = (0x80520012) HI_ERR_PDM_MTD_ERASE HI_U32 = (0x80520013) HI_ERR_PDM_MEM_ALLC HI_U32 = (0x80520014) HI_ERR_PDM_INVALID_OPT HI_U32 = (0x80520015) HI_ERR_PDM_GET_DEVINFO_ERR HI_U32 = (0x80520016) HI_ERR_LSADC_INVALID_PARA HI_U32 = (0x80520004) HI_ERR_LSADC_FAILED_INIT HI_U32 = (0x80520005) HI_ERR_UART_OPENED HI_U32 = (0x80530000) HI_ERR_UART_NOT_OPEN HI_U32 = (0x80530001) HI_ERR_UART_BUFF HI_U32 = (0x80530002) HI_ERR_UART_OPEN HI_U32 = (0x80530003) HI_ERR_UART_MAP HI_U32 = (0x80530004) HI_ERR_UART_UNMAP HI_U32 = (0x80530005) HI_ERR_UART_CLOSE HI_U32 = (0x80530006) HI_ERR_UART_DEVICE HI_U32 = (0x80530007) HI_ERR_UART_CREATE_THREAD HI_U32 = (0x80530008) HI_ERR_UART_THREAD_JOIN HI_U32 = (0x80530009) HI_ERR_UART_SET_ATTR HI_U32 = (0x8053000a) HI_ERR_UART_GET_ATTR HI_U32 = (0x8053000b) HI_ERR_UART_SPEED HI_U32 = (0x8053000c) HI_ERR_UART_IOSPEED HI_U32 = (0x8053000d) HI_ERR_UART_DATABITS HI_U32 = (0x8053000e) HI_ERR_UART_PARITY HI_U32 = (0x8053000f) HI_ERR_UART_STOPBITS HI_U32 = (0x80530010) HI_ERR_UART_WRITE HI_U32 = (0x80530011) HI_ERR_UART_GEN HI_U32 = (0x80530012) HI_ERR_PQ_DEV_NOT_EXIST HI_U32 = (0x80600001) HI_ERR_PQ_NOT_DEV_FILE HI_U32 = (0x80600002) HI_ERR_PQ_DEV_OPEN_ERR HI_U32 = (0x80600003) HI_ERR_PQ_DEV_CLOSE_ERR HI_U32 = (0x80600004) HI_ERR_PQ_NULL_PTR HI_U32 = (0x80600005) HI_ERR_PQ_NO_INIT HI_U32 = (0x80600006) HI_ERR_PQ_INVALID_PARA HI_U32 = (0x80600007) HI_ERR_PQ_PARAM_NOT_BURN HI_U32 = (0x80600008) HI_ERR_SPI_OPEN_ERR HI_U32 = (0x80700001) HI_ERR_SPI_CLOSE_ERR HI_U32 = (0x80700002) HI_ERR_SPI_NOT_INIT HI_U32 = (0x80700003) HI_ERR_SPI_INVALID_PARA HI_U32 = (0x80700004) HI_ERR_SPI_NULL_PTR HI_U32 = (0x80700005) HI_ERR_SPI_COPY_DATA_ERR HI_U32 = (0x80700006) HI_ERR_SPI_MALLOC_ERR HI_U32 = (0x80700007) HI_ERR_SPI_WRITE_TIMEOUT HI_U32 = (0x80700008) HI_ERR_SPI_READ_TIMEOUT HI_U32 = (0x80700009) )
Errors Types
const DMX_FILTER_MAX_DEPTH = 16
Filter attribute
const DMX_MAX_IDX_ACQUIRED_EACH_TIME = 256
index and record data
const HI_ID_MODULE uintptr = 0x2
Ioctl Definitions
const MAX_BUFFER_NAME_SIZE = 16
Structure of an MMZ buffer
const MAX_MODULE_NAME int = 16
const MAX_TAG_LENGTH = 12
TS Tag attributes
Variables ¶
var ( /* global */ CMD_DEMUX_GET_POOLBUF_ADDR uintptr CMD_DEMUX_GET_CAPABILITY uintptr CMD_DEMUX_SET_PUSI uintptr CMD_DEMUX_SET_TEI uintptr CMD_DEMUX_TSI_ATTACH_TSO uintptr CMD_DEMUX_GET_RESUME_COUNT uintptr /* TS PORT */ CMD_DEMUX_PORT_GET_ATTR uintptr /* get port attr */ CMD_DEMUX_PORT_SET_ATTR uintptr /* set port attr */ CMD_DEMUX_PORT_ATTACH uintptr /* attach ts port to demux */ CMD_DEMUX_PORT_DETACH uintptr /* detach ts port from demux */ CMD_DEMUX_PORT_GETID uintptr /* get ts port id of demux */ CMD_DEMUX_PORT_GETPACKETNUM uintptr /* get ts pack counter */ CMD_DEMUX_TSO_PORT_GET_ATTR uintptr /* get TSO port attr */ CMD_DEMUX_TSO_PORT_SET_ATTR uintptr /* Set TSO port attr */ CMD_DEMUX_DMX_GET_TAG_ATTR uintptr /* get port tag attrs */ CMD_DEMUX_DMX_SET_TAG_ATTR uintptr /* set port tag attrs */ /* Ts Buffer */ CMD_DEMUX_TS_BUFFER_INIT uintptr /* TS Buffer init */ CMD_DEMUX_TS_BUFFER_DEINIT uintptr /* TS Buffer deinit */ CMD_DEMUX_TS_BUFFER_GET uintptr /* Get TS Buffer */ CMD_DEMUX_TS_BUFFER_PUT uintptr /* Put TS Buffer */ CMD_DEMUX_TS_BUFFER_RESET uintptr /* Reset TS Buffer */ CMD_DEMUX_TS_BUFFER_GET_STATUS uintptr /* Get TS Buffer status */ CMD_DEMUX_TS_BUFFER_PUSH uintptr /* Push TS Buffer status*/ CMD_DEMUX_TS_BUFFER_RELEASE uintptr /* Release TS Buffer status*/ /* Channel */ CMD_DEMUX_CHAN_NEW uintptr /* apply for a free channel */ CMD_DEMUX_CHAN_NEW2 uintptr /* apply for a free channel */ CMD_DEMUX_CHAN_DEL uintptr /* delete an allocated channel */ CMD_DEMUX_CHAN_OPEN uintptr /* open channel */ CMD_DEMUX_CHAN_CLOSE uintptr /* close channel */ CMD_DEMUX_CHAN_ATTR_GET uintptr CMD_DEMUX_CHAN_ATTR_SET uintptr CMD_DEMUX_GET_CHAN_STATUS uintptr /* get channel open/close status */ CMD_DEMUX_PID_SET uintptr /* set pid of channel */ CMD_DEMUX_PID_GET uintptr /* get pid of channel */ CMD_DEMUX_CHANID_GET uintptr /* get channel id with the designated pid */ CMD_DEMUX_FREECHAN_GET uintptr /* get free channel counter */ CMD_DEMUX_SCRAMBLEFLAG_GET uintptr /* get scrambed flag of audio channel */ CMD_DEMUX_CHAN_SET_EOS_FLAG uintptr CMD_DEMUX_CHAN_CC_REPEAT_SET uintptr /* set channel CC repeat attr*/ CMD_DEMUX_GET_CHAN_TSCNT uintptr /* get channel ts count */ /* Filter */ CMD_DEMUX_FLT_NEW uintptr /* apply for a free filter */ CMD_DEMUX_FLT_DEL uintptr /* delete an allocated filter */ CMD_DEMUX_FLT_SET uintptr /* set fiter parameter */ CMD_DEMUX_FLT_GET uintptr /* get fiter parameter */ CMD_DEMUX_FLT_ATTACH uintptr /* attach a filter to a channel */ CMD_DEMUX_FLT_DETACH uintptr /* detach a filter from a channel */ CMD_DEMUX_FREEFLT_GET uintptr /* get free filter coute */ CMD_DEMUX_FLT_DELALL uintptr /* delete all filters on a channel */ CMD_DEMUX_FLT_CHANID_GET uintptr /* data receive */ CMD_DEMUX_GET_DATA_FLAG uintptr /* get data flag of dma buffer */ CMD_DEMUX_COMPAT_GET_DATA_FLAG uintptr /* get data flag of dma buffer */ CMD_DEMUX_ACQUIRE_MSG uintptr CMD_DEMUX_COMPAT_ACQUIRE_MSG uintptr CMD_DEMUX_RELEASE_MSG uintptr CMD_DEMUX_COMPAT_RELEASE_MSG uintptr CMD_DEMUX_SELECT_DATA_FLAG uintptr CMD_DEMUX_COMPAT_SELECT_DATA_FLAG uintptr /* PCR */ CMD_DEMUX_PCR_NEW uintptr /* set pcr pid */ CMD_DEMUX_PCR_DEL uintptr /* set pcr pid */ CMD_DEMUX_PCRPID_SET uintptr /* set pcr pid */ CMD_DEMUX_PCRPID_GET uintptr /* get pcr pid */ CMD_DEMUX_CURPCR_GET uintptr /* get pcr count */ CMD_DEMUX_PCRSYN_ATTACH uintptr /* attach pcr channel and sync handle */ CMD_DEMUX_PCRSYN_DETACH uintptr /* detach pcr channel and sync handle */ /* AV */ CMD_DEMUX_PES_BUFFER_GETSTAT uintptr /* Get PES Buffer status */ CMD_DEMUX_ES_BUFFER_GET uintptr /* Get ES Buffer */ CMD_DEMUX_ES_BUFFER_PUT uintptr /* Put ES Buffer */ /* REC */ CMD_DEMUX_REC_CHAN_CREATE uintptr CMD_DEMUX_REC_CHAN_DESTROY uintptr CMD_DEMUX_REC_CHAN_ADD_PID uintptr CMD_DEMUX_REC_CHAN_DEL_PID uintptr CMD_DEMUX_REC_CHAN_DEL_ALL_PID uintptr CMD_DEMUX_REC_CHAN_ADD_EXCLUDE_PID uintptr CMD_DEMUX_REC_CHAN_DEL_EXCLUDE_PID uintptr CMD_DEMUX_REC_CHAN_CANCEL_EXCLUDE uintptr CMD_DEMUX_REC_CHAN_START uintptr CMD_DEMUX_REC_CHAN_STOP uintptr CMD_DEMUX_REC_CHAN_ACQUIRE_DATA uintptr CMD_DEMUX_REC_CHAN_RELEASE_DATA uintptr CMD_DEMUX_REC_CHAN_ACQUIRE_INDEX uintptr CMD_DEMUX_REC_CHAN_GET_BUF_STATUS uintptr CMD_DEMUX_REC_CHAN_ACQUIRE_DATA_INDEX uintptr CMD_DEMUX_COMPAT_REC_CHAN_ACQUIRE_DATA_INDEX uintptr CMD_DEMUX_REC_CHAN_RELEASE_DATA_INDEX uintptr CMD_DEMUX_COMPAT_REC_CHAN_RELEASE_DATA_INDEX uintptr /* RMX */ CMD_REMUX_CREATE uintptr CMD_REMUX_DESTROY uintptr CMD_REMUX_GET_ATTR uintptr CMD_REMUX_SET_ATTR uintptr CMD_REMUX_START uintptr CMD_REMUX_STOP uintptr CMD_REMUX_ADD_PUMP uintptr CMD_REMUX_DEL_PUMP uintptr CMD_REMUX_GET_PUMP_DEFAULT_ATTR uintptr CMD_REMUX_GET_PUMP_ATTR uintptr CMD_REMUX_SET_PUMP_ATTR uintptr )
var ( /** Ioctl Definitions **/ /* 1:check keyup */ CMD_IR_ENABLE_KEYUP uintptr /* 1:check repkey, 0:hardware behave */ CMD_IR_ENABLE_REPKEY uintptr CMD_IR_SET_REPKEY_TIMEOUT uintptr /* 1:enable ir, 0:disable ir */ CMD_IR_SET_ENABLE uintptr CMD_IR_RESET uintptr CMD_IR_SET_BLOCKTIME uintptr CMD_IR_SET_FORMAT uintptr CMD_IR_SET_BUF uintptr /* raw symbol fetch(1) or key fetch(0) */ CMD_IR_SET_FETCH_METHOD uintptr /* enable or disalbe a protocol */ CMD_IR_SET_PROT_ENABLE uintptr CMD_IR_SET_PROT_DISABLE uintptr CMD_IR_GET_PROT_ENABLED uintptr )
var ( CMD_ADD_MODULE_INFO = IoRW(HI_ID_MODULE, IOC_MODULE_CMD_ADD_INFO, unsafe.Sizeof(MODULE_INFO_S{})) CMD_DEL_MODULE_INFO = IoW(HI_ID_MODULE, IOC_MODULE_CMD_DEL_INFO, unsafe.Sizeof(MODULE_INFO_S{})) CMD_GET_MODULE_INFO = IoRW(HI_ID_MODULE, IOC_MODULE_CMD_GET_INFO, unsafe.Sizeof(MODULE_INFO_S{})) CMD_SET_MODULE_FUNC = IoW(HI_ID_MODULE, IOC_MODULE_CMD_SET_FUNC, unsafe.Sizeof(MODULE_INFO_S{})) CMD_GET_MODULE_FUNC = IoR(HI_ID_MODULE, IOC_MODULE_CMD_GET_FUNC, unsafe.Sizeof(MODULE_INFO_S{})) CMD_MEM_ADD_INFO = IoW(HI_ID_MODULE, IOC_MODULE_CMD_MEM_ADD, unsafe.Sizeof(MODULE_MEM_INFO_S{})) CMD_MEM_DEL_INFO = IoW(HI_ID_MODULE, IOC_MODULE_CMD_MEM_DEL, unsafe.Sizeof(MODULE_MEM_INFO_S{})) CMD_ALLOC_MODULE_ID = IoRW(HI_ID_MODULE, IOC_MODULE_CMD_ALLOC_ID, unsafe.Sizeof(MODULE_ALLOC_S{})) )
var ( /** Ioctl Definitions **/ CMD_SCI_OPEN uintptr CMD_SCI_CLOSE uintptr CMD_SCI_RESET uintptr CMD_SCI_DEACTIVE uintptr CMD_SCI_GET_ATR uintptr CMD_SCI_COMPAT_GET_ATR uintptr CMD_SCI_GET_STATUS uintptr CMD_SCI_CONF_VCC uintptr CMD_SCI_CONF_DETECT uintptr CMD_SCI_CONF_MODE uintptr CMD_SCI_SEND_DATA uintptr CMD_SCI_COMPAT_SEND_DATA uintptr CMD_SCI_RECEIVE_DATA uintptr CMD_SCI_COMPAT_RECEIVE_DATA uintptr CMD_SCI_SWITCH uintptr CMD_SCI_SET_BAUD uintptr CMD_SCI_SET_CHGUARD uintptr CMD_SCI_SEND_PPS_DATA uintptr CMD_SCI_GET_PPS_DATA uintptr CMD_SCI_GET_PARAM uintptr CMD_SCI_SET_CHARTIMEOUT uintptr CMD_SCI_SET_BLOCKTIMEOUT uintptr CMD_SCI_SET_TXRETRY uintptr )
Functions ¶
func HI_MODULE_DeInit ¶
func HI_MODULE_GetModuleName ¶
func HI_MODULE_Init ¶
func HI_MODULE_Register ¶
func HI_MODULE_UnRegister ¶
func HI_UNF_DMX_DeInit ¶
************************************************************ Function: HI_UNF_DMX_DeInit Description: close ir device Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_DMX_GetCapability ¶
func HI_UNF_DMX_GetCapability(pstCap *HI_UNF_DMX_CAPABILITY_S) (bool, error)
func HI_UNF_DMX_Init ¶
************************************************************ Function: HI_UNF_DMX_Init Description: open demux device, and do the basical initialization Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_DeInit ¶
************************************************************ Function: HI_UNF_IR_DeInit Description: close ir device Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_DisableProtocol ¶
************************************************************ Function: HI_UNF_IR_DisableProtocol Description: disable a infrared code specified by @prot_name Calls: Data Accessed: Data Updated: NA Input: pszProtocolName: infrared code name. Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_Enable ¶
************************************************************ Function: HI_UNF_IR_Enable Description: Enable ir device Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_EnableKeyUp ¶
************************************************************ Function: HI_UNF_IR_EnableKeyUp Description: config whether report the state of key release Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_EnableProtocol ¶
************************************************************ Function: HI_UNF_IR_EnableProtocol Description: enable an infrared code specified by @prot_name Calls: Data Accessed: Data Updated: NA Input: pszProtocolName: infrared code name. Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_EnableRepKey ¶
************************************************************ Function: HI_UNF_IR_EnableRepKey Description: config whether report repeat key Calls: Data Accessed: Data Updated: NA Input: bEnable Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_GetProtocol ¶
func HI_UNF_IR_GetProtocol(penProtocol *HI_UNF_IR_PROTOCOL_E) (bool, error)
************************************************************ Function: HI_UNF_IR_GetProtocol Description: get the type of ir protocol Calls: Data Accessed: Data Updated: NA Input: NA Output: penProtocol: ir protocol of the key Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_GetProtocolEnabled ¶
************************************************************ Function: HI_UNF_IR_GetProtocolEnabled Description: get the enable status of an infrared code specified by @prot_name Calls: Data Accessed: Data Updated: NA Input: pszProtocolName: infrared code name. Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_GetProtocolName ¶
************************************************************ Function: HI_UNF_IR_GetProtocolName Description: reserved Calls: Data Accessed: Data Updated: NA Input: pProtocolName, s32BufLen Output: pProtocolName Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_GetSymbol ¶
************************************************************ Function: HI_UNF_IR_GetSymbol Description: get one raw symbols from ir module. Calls: Data Accessed: Data Updated: NA Input: u32TimeoutMs: read timeout in ms. Output: pu64lower, pu64upper. Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_Init ¶
************************************************************ Function: HI_UNF_IR_Init Description: open ir device,and do the basical initialization Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_Reset ¶
************************************************************ Function: HI_UNF_IR_Reset Description: Reset ir device Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_SetCodeType ¶
func HI_UNF_IR_SetCodeType(enIRCode HI_UNF_IR_CODE_E) bool
************************************************************ Function: HI_UNF_IR_SetCodeType Description: reserved interface. Calls: Data Accessed: Data Updated: NA Input: enIRCode Output: Return: bool
Others: NA ************************************************************
func HI_UNF_IR_SetFetchMode ¶
************************************************************ Function: HI_UNF_IR_SetFetchMode Description: set key fetch mode or symbol mode. Calls: Data Accessed: Data Updated: NA Input: bMode: true-> key mode. false-> raw symbol mode. Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_IR_SetRepKeyTimeoutAttr ¶
************************************************************ Function: HI_UNF_IR_RepKeyTimeoutVal Description: Set the reporting interval when you keep pressing button. Calls: Data Accessed: Data Updated: NA Input: u32TimeoutMs The minimum interval to report repeat key Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_Close ¶
func HI_UNF_SCI_Close(port HI_UNF_SCI_PORT_E) (bool, error)
************************************************************ Function: HI_UNF_SCI_Close Description: close SCI device Calls: HI_SCI_Close Data Accessed: NA Data Updated: NA Input: port Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_ConfigClkMode ¶
func HI_UNF_SCI_ConfigClkMode(mode SCI_IO_OUTPUTTYPE_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_ConfigClkMode Description: Config CLK Work Mode(OD or CMOS) Calls: HI_SCI_ConfigClkMode Data Accessed: NA Data Updated: NA Input: mode Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_ConfigDetect ¶
func HI_UNF_SCI_ConfigDetect(level SCI_LEVEL_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_ConfigDetect Description: Set the valid level of Detect Calls: HI_SCI_ConfigDetect Data Accessed: NA Data Updated: NA Input: level Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_ConfigResetMode ¶
func HI_UNF_SCI_ConfigResetMode(mode SCI_IO_OUTPUTTYPE_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_ConfigResetMode Description: Config Reset Work Mode (OD or CMOS) Calls: HI_UNF_SCI_ConfigResetMode Data Accessed: NA Data Updated: NA Input: mode Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_ConfigVccEn ¶
func HI_UNF_SCI_ConfigVccEn(level SCI_LEVEL_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_ConfigVccEn Description: Set the valid level of VCC Calls: HI_SCI_ConfigVccEn Data Accessed: NA Data Updated: NA Input: level Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_ConfigVccEnMode ¶
func HI_UNF_SCI_ConfigVccEnMode(mode SCI_IO_OUTPUTTYPE_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_ConfigVccEnMode Description: Config VCC Work Mode (OD or CMOS) Calls: HI_UNF_SCI_ConfigVccEnMode Data Accessed: NA Data Updated: NA Input: mode Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_DeInit ¶
************************************************************ Function: HI_UNF_SCI_DeInit Description: close sci device Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_DeactiveCard ¶
func HI_UNF_SCI_DeactiveCard(port HI_UNF_SCI_PORT_E) (bool, error)
************************************************************ Function: HI_UNF_SCI_DeactiveCard Description: Deactive Card Calls: HI_SCI_DeactiveCard Data Accessed: NA Data Updated: NA Input: reset Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_GetATR ¶
************************************************************ Function: HI_UNF_SCI_GetATR Description: Get ATR Data Calls: HI_SCI_GetATR Data Accessed: NA Data Updated: NA Input: atr Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_GetCardStatus ¶
func HI_UNF_SCI_GetCardStatus(status *SCI_STATUS_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_GetCardStatus Description: Get the Status of Card Calls: HI_UNF_SCI_GetCardStatus Data Accessed: NA Data Updated: NA Input: status Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_GetPPSResponData ¶
************************************************************ Function: HI_UNF_SCI_GetPPSResponData Description: Get PPS Negotiation Respond Data Calls: HI_UNF_SCI_GetPPSResponData Data Accessed: NA Data Updated: NA Input: pps Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_GetParams ¶
func HI_UNF_SCI_GetParams(params *HI_UNF_SCI_PARAMS_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_GetParams Description: Get SCI Parameter Calls: HI_UNF_SCI_GetParams Data Accessed: NA Data Updated: NA Input: params Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_Init ¶
************************************************************ Function: HI_UNF_SCI_Init Description: open sci device,and do the basical initialization Calls: Data Accessed: Data Updated: NA Input: Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_NegotiatePPS ¶
************************************************************ Function: HI_UNF_SCI_NegotiatePPS Description: Request PPS Negotiation Calls: HI_UNF_SCI_NegotiatePPS Data Accessed: NA Data Updated: NA Input: pps Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_Open ¶
func HI_UNF_SCI_Open(config SCI_OPEN_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_Open Description: open SCI device Calls: HI_SCI_Open Data Accessed: NA Data Updated: NA Input: config Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_Receive ¶
func HI_UNF_SCI_Receive(data *SCI_DATA_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_Receive Description: Receive Data from Card Calls: HI_SCI_Receive Data Accessed: NA Data Updated: NA Input: data Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_ResetCard ¶
func HI_UNF_SCI_ResetCard(reset SCI_RESET_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_ResetCard Description: Reset Card Calls: HI_UNF_SCI_ResetCard Data Accessed: NA Data Updated: NA Input: reset Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_Send ¶
func HI_UNF_SCI_Send(data *SCI_DATA_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_Send Description: Send Data to Card Calls: HI_SCI_Send Data Accessed: NA Data Updated: NA Input: data Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_SetBlockTimeout ¶
func HI_UNF_SCI_SetBlockTimeout(timeout SCI_BLOCKTIMEOUT_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_SetBlockTimeout Description: Set T1 block timeout Calls: HI_UNF_SCI_SetBlockTimeout Data Accessed: NA Data Updated: NA Input: timeout Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_SetCharTimeout ¶
func HI_UNF_SCI_SetCharTimeout(timeout SCI_CHARTIMEOUT_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_SetCharTimeout Description: Set T0 or T1 char timeout Calls: HI_UNF_SCI_SetCharTimeout Data Accessed: NA Data Updated: NA Input: timeout Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_SetEtuFactor ¶
func HI_UNF_SCI_SetEtuFactor(baudrate SCI_EXT_BAUD_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_SetEtuFactor Description: Set Work BaudRate Calls: HI_UNF_SCI_SetEtuFactor Data Accessed: NA Data Updated: NA Input: baudrate Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_SetGuardTime ¶
func HI_UNF_SCI_SetGuardTime(guard SCI_ADD_GUARD_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_SetGuardTime Description: Set Guard Delay Time Calls: HI_UNF_SCI_SetGuardTime Data Accessed: NA Data Updated: NA Input: guard Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_SetTxRetries ¶
func HI_UNF_SCI_SetTxRetries(tx SCI_TXRETRY_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_SetTxRetries Description: Set TX Retry Times Calls: HI_UNF_SCI_SetTxRetries Data Accessed: NA Data Updated: NA Input: tx Output: Return: bool
error
Others: NA ************************************************************
func HI_UNF_SCI_SwitchCard ¶
func HI_UNF_SCI_SwitchCard(config SCI_OPEN_S) (bool, error)
************************************************************ Function: HI_UNF_SCI_SwitchCard Description: Change Card Calls: HI_UNF_SCI_SwitchCard Data Accessed: NA Data Updated: NA Input: config Output: Return: bool
error
Others: NA ************************************************************
func Io ¶
Io used for a simple ioctl that sends nothing but the type and number, and receives back nothing but an (integer) retval.
func IoR ¶
IoR used for an ioctl that reads data from the device driver. The driver will be allowed to return sizeof(data_type) bytes to the user.
func IoRW ¶
IoRW a combination of IoR and IoW. That is, data is both written to the driver and then read back from the driver by the client.
Types ¶
type DMX_AcqMsg_S ¶
type DMX_AcqMsg_S struct {
// contains filtered or unexported fields
}
type DMX_BUF_FLAG_E ¶
type DMX_BUF_FLAG_E int32
const ( DMX_MMZ_BUF DMX_BUF_FLAG_E = iota DMX_MMU_BUF DMX_SECURE_BUF )
type DMX_BUF_S ¶
type DMX_BUF_S struct { VirAddr *HI_U8 /* Virtual address of a buffer. */ PhyAddr HI_U32 /* Physical address of a buffer. */ Size HI_U32 /* Buffer size, in the unit of byte. */ Flag DMX_BUF_FLAG_E }
type DMX_CB_DESC_S ¶
type DMX_CB_DESC_S struct { Handle HI_HANDLE Raw HI_UNF_DMX_CB_DESC_S }
type DMX_ChanChanTsCnt_S ¶
type DMX_ChanChanTsCnt_S struct {
// contains filtered or unexported fields
}
type DMX_ChanNew_S ¶
type DMX_ChanNew_S struct { BufPhyAddr HI_U32 BufSize HI_U32 BufFlag DMX_BUF_FLAG_E // contains filtered or unexported fields }
type DMX_ChanPIDGet_S ¶
type DMX_ChanPIDGet_S struct {
// contains filtered or unexported fields
}
type DMX_ChanPIDSet_S ¶
type DMX_ChanPIDSet_S struct {
// contains filtered or unexported fields
}
type DMX_ChanStatusGet_S ¶
type DMX_ChanStatusGet_S struct {
// contains filtered or unexported fields
}
type DMX_ChannelIdGet_S ¶
type DMX_ChannelIdGet_S struct {
// contains filtered or unexported fields
}
type DMX_Compat_AcqMsg_S ¶
type DMX_Compat_AcqMsg_S struct {
// contains filtered or unexported fields
}
type DMX_Compat_REC_DATA_INDEX_S ¶
type DMX_Compat_REC_DATA_INDEX_S struct {
// contains filtered or unexported fields
}
Compat define for HI_UNF_DMX_REC_DATA_INDEX_S.
type DMX_Compat_Rec_ProcessDataIndex_S ¶
type DMX_Compat_Rec_ProcessDataIndex_S struct { RecHandle HI_HANDLE RecDataIdx DMX_Compat_REC_DATA_INDEX_S }
type DMX_Compat_RelMsg_S ¶
type DMX_Compat_RelMsg_S struct {
// contains filtered or unexported fields
}
type DMX_DATA_BUF_S ¶
type DMX_FilterAttach_S ¶
type DMX_FilterChannelIDGet_S ¶
type DMX_FilterChannelIDGet_S = DMX_FilterAttach_S
type DMX_FilterDetach_S ¶
type DMX_FilterDetach_S = DMX_FilterAttach_S
type DMX_FilterGet_S ¶
type DMX_FilterGet_S = DMX_FilterSet_S
type DMX_FilterSet_S ¶
type DMX_FilterSet_S struct { Filter HI_HANDLE FilterAttr HI_UNF_DMX_FILTER_ATTR_S }
type DMX_FreeChanGet_S ¶
type DMX_FreeChanGet_S struct {
// contains filtered or unexported fields
}
type DMX_FreeFilterGet_S ¶
type DMX_GetChan_Attr_S ¶
type DMX_GetChan_Attr_S struct {
// contains filtered or unexported fields
}
type DMX_GetDataFlag_S ¶
type DMX_GetDataFlag_S struct { ValidChannel *HI_HANDLE /* channel has data ready */ ValidChannelNum *HI_U32 /* channel has data number */ // contains filtered or unexported fields }
#if defined(CHIP_TYPE_hi3798cv200_a) || defined(CHIP_TYPE_hi3798cv200_b) ||defined(CHIP_TYPE_hi3798cv200) || defined(CHIP_TYPE_hi3716mv410) || defined(CHIP_TYPE_hi3716mv420)
type DMX_IDX_DATA_S ¶
type DMX_IDX_DATA_S struct {
// contains filtered or unexported fields
}
Sequence of DMX_IDX_DATA_S 's member can not change, must match the sequence defined by hardware
type DMX_MMZ_BUF_S ¶
type DMX_MMZ_BUF_S struct { VirAddr *HI_U8 /* Virtual address of a buffer. */ PhyAddr HI_U32 /* Physical address of a buffer. */ Size HI_U32 /* Buffer size, in the unit of byte. */ Flag DMX_BUF_FLAG_E }
type DMX_NewFilter_S ¶
type DMX_NewFilter_S struct { DmxId HI_U32 FilterAttr HI_UNF_DMX_FILTER_ATTR_S Filter HI_HANDLE }
type DMX_NewPcr_S ¶
type DMX_NewPcr_S struct {
// contains filtered or unexported fields
}
type DMX_PCRSYNC_S ¶
type DMX_PCRSYNC_S struct {
// contains filtered or unexported fields
}
type DMX_PORT_MODE_E ¶
type DMX_PORT_MODE_E int32
const ( DMX_PORT_MODE_TUNER DMX_PORT_MODE_E = iota DMX_PORT_MODE_RAM DMX_PORT_MODE_TAG DMX_PORT_MODE_RMX DMX_PORT_MODE_BUTT )
type DMX_PcrPidGet_S ¶
type DMX_PcrPidGet_S = DMX_PcrPidSet_S
type DMX_PcrPidSet_S ¶
type DMX_PcrPidSet_S struct {
// contains filtered or unexported fields
}
type DMX_PcrScrGet_S ¶
type DMX_PcrScrGet_S struct {
// contains filtered or unexported fields
}
type DMX_PcrValGet_S ¶
type DMX_PcrValGet_S struct {
// contains filtered or unexported fields
}
type DMX_PesBufAttach_S ¶
type DMX_PesBufAttach_S struct {
// contains filtered or unexported fields
}
type DMX_PesBufGet_S ¶
type DMX_PesBufStaGet_S ¶
type DMX_PesBufStaGet_S struct {
// contains filtered or unexported fields
}
type DMX_PoolBuf_Attr_S ¶
type DMX_PoolBuf_Attr_S struct { BufPhyAddr HI_U32 BufSize HI_U32 BufFlag DMX_BUF_FLAG_E }
type DMX_PortPacketNum_S ¶
type DMX_PortPacketNum_S struct { PortMode DMX_PORT_MODE_E PortId HI_U32 TsPackCnt HI_U32 ErrTsPackCnt HI_U32 }
type DMX_Port_Attach_S ¶
type DMX_Port_Attach_S struct { PortMode DMX_PORT_MODE_E PortId HI_U32 DmxId HI_U32 }
type DMX_Port_GetAttr_S ¶
type DMX_Port_GetAttr_S struct { PortMode DMX_PORT_MODE_E PortId HI_U32 PortAttr HI_UNF_DMX_PORT_ATTR_S }
type DMX_Port_GetId_S ¶
type DMX_Port_GetId_S = DMX_Port_Attach_S
type DMX_Port_SetAttr_S ¶
type DMX_Port_SetAttr_S = DMX_Port_GetAttr_S
type DMX_Rec_AcquireData_S ¶
type DMX_Rec_AcquireIndex_S ¶
type DMX_Rec_AcquireIndex_S struct { RecHandle HI_HANDLE IndexData HI_UNF_DMX_REC_INDEX_S TimeoutMs HI_U32 }
type DMX_Rec_AcquireScd_S ¶
type DMX_Rec_AcquireScd_S struct { RecHandle HI_HANDLE RecData HI_UNF_DMX_REC_DATA_S TimeoutMs HI_U32 }
type DMX_Rec_AddPid_S ¶
type DMX_Rec_BufStatus_S ¶
type DMX_Rec_BufStatus_S struct { RecHandle HI_HANDLE BufStatus HI_UNF_DMX_RECBUF_STATUS_S }
type DMX_Rec_CreateChan_S ¶
type DMX_Rec_CreateChan_S struct { RecHandle HI_HANDLE RecAttr HI_UNF_DMX_REC_ATTR_S RecBufPhyAddr HI_U32 RecBufSize HI_U32 RecBufFlag DMX_BUF_FLAG_E }
type DMX_Rec_DelPid_S ¶
type DMX_Rec_ExcludePid_S ¶
type DMX_Rec_ProcessDataIndex_S ¶
type DMX_Rec_ProcessDataIndex_S struct { RecHandle HI_HANDLE RecDataIdx HI_UNF_DMX_REC_DATA_INDEX_S }
type DMX_Rec_ReleaseData_S ¶
type DMX_Rec_ReleaseScd_S ¶
type DMX_Rec_ReleaseScd_S struct { RecHandle HI_HANDLE RecData HI_UNF_DMX_REC_DATA_S }
type DMX_RelMsg_S ¶
type DMX_RelMsg_S struct {
// contains filtered or unexported fields
}
type DMX_ScrambledFlagGet_S ¶
type DMX_ScrambledFlagGet_S struct {
// contains filtered or unexported fields
}
type DMX_SelectDataFlag_S ¶
type DMX_SetChan_Attr_S ¶
type DMX_SetChan_Attr_S = DMX_GetChan_Attr_S
type DMX_SetChan_CC_REPEAT_S ¶
type DMX_SetChan_CC_REPEAT_S struct {
// contains filtered or unexported fields
}
type DMX_Stream_S ¶
type DMX_Stream_S struct {
// contains filtered or unexported fields
}
type DMX_TSO_Port_Attr_S ¶
type DMX_TSO_Port_Attr_S struct { PortId HI_U32 PortAttr HI_UNF_DMX_TSO_PORT_ATTR_S }
type DMX_Tag_GetAttr_S ¶
type DMX_Tag_GetAttr_S struct { DmxId HI_U32 TagAttr HI_UNF_DMX_TAG_ATTR_S }
type DMX_Tag_SetAttr_S ¶
type DMX_Tag_SetAttr_S = DMX_Tag_GetAttr_S
type DMX_TsBufGet_S ¶
type DMX_TsBufInit_S ¶
type DMX_TsBufInit_S struct { PortId HI_U32 BufPhyAddr HI_U32 BufSize HI_U32 BufFlag DMX_BUF_FLAG_E }
type DMX_TsBufPush_S ¶
type DMX_TsBufPut_S ¶
type DMX_TsBufRel_S ¶
type DMX_TsBufStaGet_S ¶
type DMX_TsBufStaGet_S struct { PortId HI_U32 Status HI_UNF_DMX_TSBUF_STATUS_S }
type DMX_UserMsg_S ¶
type DMX_UserMsg_S struct {
// contains filtered or unexported fields
}
type HI_CHIP_CAP_E ¶
type HI_CHIP_CAP_E int32
Define the chip support attrs
const ( HI_CHIP_CAP_DOLBY HI_CHIP_CAP_E = iota HI_CHIP_CAP_DTS HI_CHIP_CAP_ADVCA HI_CHIP_CAP_MACROVISION )
type HI_CHIP_PACKAGE_TYPE_E ¶
type HI_CHIP_PACKAGE_TYPE_E int32
const ( HI_CHIP_PACKAGE_TYPE_BGA_15_15 HI_CHIP_PACKAGE_TYPE_E = iota HI_CHIP_PACKAGE_TYPE_BGA_16_16 HI_CHIP_PACKAGE_TYPE_BGA_19_19 HI_CHIP_PACKAGE_TYPE_BGA_23_23 HI_CHIP_PACKAGE_TYPE_BGA_31_31 HI_CHIP_PACKAGE_TYPE_QFP_216 HI_CHIP_PACKAGE_TYPE_BUTT )
type HI_CHIP_TYPE_E ¶
type HI_CHIP_TYPE_E int32
Define the chip type.
const ( HI_CHIP_TYPE_HI3716M HI_CHIP_TYPE_E = iota HI_CHIP_TYPE_HI3716H HI_CHIP_TYPE_HI3716C HI_CHIP_TYPE_HI3716CES HI_CHIP_TYPE_HI3720 HI_CHIP_TYPE_HI3712 HI_CHIP_TYPE_HI3715 HI_CHIP_TYPE_HI3718M HI_CHIP_TYPE_HI3718C HI_CHIP_TYPE_HI3719M HI_CHIP_TYPE_HI3719C HI_CHIP_TYPE_HI3719M_A )
const ( HI_CHIP_TYPE_HI3796C HI_CHIP_TYPE_E = iota + 0x20 HI_CHIP_TYPE_HI3798C HI_CHIP_TYPE_HI3796M HI_CHIP_TYPE_HI3798M )
const ( HI_CHIP_TYPE_HI3796C_A HI_CHIP_TYPE_E = iota + 0x40 HI_CHIP_TYPE_HI3798C_A HI_CHIP_TYPE_HI3798C_B HI_CHIP_TYPE_HI3798M_A HI_CHIP_TYPE_BUTT )
type HI_CHIP_VERSION_E ¶
type HI_CHIP_VERSION_E int32
Define the chip version.
const ( HI_CHIP_VERSION_V100 HI_CHIP_VERSION_E = 0x100 HI_CHIP_VERSION_V101 HI_CHIP_VERSION_E = 0x101 HI_CHIP_VERSION_V200 HI_CHIP_VERSION_E = 0x200 HI_CHIP_VERSION_V300 HI_CHIP_VERSION_E = 0x300 HI_CHIP_VERSION_V400 HI_CHIP_VERSION_E = 0x400 HI_CHIP_VERSION_V410 HI_CHIP_VERSION_E = 0x410 HI_CHIP_VERSION_V420 HI_CHIP_VERSION_E = 0x420 HI_CHIP_VERSION_BUTT )
type HI_DRV_DMX_BUF_STATUS_S ¶
type HI_DRV_DMX_BUF_STATUS_S struct {
// contains filtered or unexported fields
}
type HI_LAYER_ZORDER_E ¶
type HI_LAYER_ZORDER_E int32
const ( HI_LAYER_ZORDER_MOVETOP HI_LAYER_ZORDER_E = iota /* Move to the top */ HI_LAYER_ZORDER_MOVEUP /* Move up */ HI_LAYER_ZORDER_MOVEBOTTOM /* Move to the bottom */ HI_LAYER_ZORDER_MOVEDOWN /* Move down */ HI_LAYER_ZORDER_BUTT )
type HI_LENGTH_T ¶
type HI_LENGTH_T = uint64
type HI_MMZ_BUF_S ¶
type HI_MMZ_BUF_S struct {
// contains filtered or unexported fields
}
type HI_MPI_DMX_BUF_STATUS_S ¶
type HI_MPI_DMX_BUF_STATUS_S struct {
// contains filtered or unexported fields
}
type HI_MPI_DMX_PORT_E ¶
type HI_MPI_DMX_PORT_E int32
const ( HI_MPI_DMX_PORT_RMX_0 HI_MPI_DMX_PORT_E = iota + 0xa0 HI_MPI_DMX_PORT_BUTT )
type HI_MPI_RMX_ATTR_S ¶
type HI_MPI_RMX_ATTR_S struct {
// contains filtered or unexported fields
}
type HI_MPI_RMX_PUMP_ATTR_S ¶
type HI_MPI_RMX_PUMP_ATTR_S struct {
// contains filtered or unexported fields
}
type HI_MPI_RMX_PUMP_TYPE_E ¶
type HI_MPI_RMX_PUMP_TYPE_E int32
const ( HI_MPI_RMX_PUMP_TYPE_PID HI_MPI_RMX_PUMP_TYPE_E = iota HI_MPI_RMX_PUMP_TYPE_REMAP_PID HI_MPI_RMX_PUMP_TYPE_ALLPASS_PORT HI_MPI_RMX_PUMP_TYPE_BUTT )
type HI_PHYS_ADDR_T ¶
type HI_PHYS_ADDR_T = uint32
type HI_PROC_CMD_FN ¶
type HI_PROC_CMD_FN *func(pstBuf *HI_PROC_SHOW_BUFFER_S, u32Argc HI_U32, pu8Argv *[]HI_U8, pPrivData *HI_VOID) HI_S32
Proc command function
type HI_PROC_ENTRY_S ¶
type HI_PROC_ENTRY_S struct {
// contains filtered or unexported fields
}
Defines user mode proc entry
type HI_PROC_SHOW_BUFFER_S ¶
type HI_PROC_SHOW_BUFFER_S struct {
// contains filtered or unexported fields
}
Defines user mode proc show buffer
type HI_PROC_SHOW_FN ¶
type HI_PROC_SHOW_FN *func(pstBuf *HI_PROC_SHOW_BUFFER_S, pPrivData *HI_VOID) HI_S32
Proc show function
type HI_SYS_CHIP_ATTR_S ¶
type HI_SYS_CHIP_ATTR_S struct {
// contains filtered or unexported fields
}
Define the chip attributes
type HI_SYS_CONF_S ¶
type HI_SYS_CONF_S struct {
// contains filtered or unexported fields
}
Structs Definitions
* Global config structure
type HI_SYS_MEM_CONFIG_S ¶
type HI_SYS_MEM_CONFIG_S struct {
// contains filtered or unexported fields
}
Defines DDR configuration type struct
type HI_SYS_VERSION_S ¶
type HI_SYS_VERSION_S struct { BootVersion [80]HI_CHAR /* Version string of the Boot */ // contains filtered or unexported fields }
System version, that is, the version of the software developer's kit (SDK)
type HI_UNF_DMX_CAPABILITY_S ¶
type HI_UNF_DMX_CAPABILITY_S struct {
// contains filtered or unexported fields
}
Structs Definitions Defines the capability of the DEMUX module
type HI_UNF_DMX_CB_CONTEXT_TYPE_E ¶
type HI_UNF_DMX_CB_CONTEXT_TYPE_E int32
Define cb context type
const ( HI_UNF_DMX_CB_CONTEXT_TYPE_SHARED HI_UNF_DMX_CB_CONTEXT_TYPE_E = iota /* public shared context thread */ HI_UNF_DMX_CB_CONTEXT_TYPE_PRIVATE /* private context thread */ HI_UNF_DMX_CB_CONTEXT_TYPE_BUTT )
type HI_UNF_DMX_CB_DESC_S ¶
type HI_UNF_DMX_CB_DESC_S struct {
// contains filtered or unexported fields
}
Define cb descriptor
type HI_UNF_DMX_CHAN_ATTR_S ¶
type HI_UNF_DMX_CHAN_ATTR_S struct {
// contains filtered or unexported fields
}
Channel attribute
type HI_UNF_DMX_CHAN_BUF_CB_FUNC ¶
type HI_UNF_DMX_CHAN_BUF_CB_FUNC *func(hChannel HI_HANDLE, u32AcquiredNum HI_U32, pstBuf *HI_UNF_DMX_DATA_S, pUserData *HI_VOID) HI_S32
Declare section/pes/post cb function interface
type HI_UNF_DMX_CHAN_CC_REPEAT_MODE_E ¶
type HI_UNF_DMX_CHAN_CC_REPEAT_MODE_E int32
Repeat CC mode of channel
type HI_UNF_DMX_CHAN_CC_REPEAT_SET_S ¶
type HI_UNF_DMX_CHAN_CC_REPEAT_SET_S struct {
// contains filtered or unexported fields
}
type HI_UNF_DMX_CHAN_CRC_MODE_E ¶
type HI_UNF_DMX_CHAN_CRC_MODE_E int32
Cyclic redundancy check (CRC) mode of a channel
const ( HI_UNF_DMX_CHAN_CRC_MODE_FORBID HI_UNF_DMX_CHAN_CRC_MODE_E = iota /* The CRC check is disabled */ HI_UNF_DMX_CHAN_CRC_MODE_FORCE_AND_DISCARD /* The CRC check is enabled, and the error Section data is discarded */ HI_UNF_DMX_CHAN_CRC_MODE_FORCE_AND_SEND /* The CRC check is enabled, and the error Section data is received */ HI_UNF_DMX_CHAN_CRC_MODE_BY_SYNTAX_AND_DISCARD /* Whether the CRC check is performed depends on the syntax, and the error Section data is discarded */ HI_UNF_DMX_CHAN_CRC_MODE_BY_SYNTAX_AND_SEND /* Whether the CRC check is performed depends on the syntax, and the error Section data is received */ HI_UNF_DMX_CHAN_CRC_MODE_BUTT )
type HI_UNF_DMX_CHAN_OUTPUT_MODE_E ¶
type HI_UNF_DMX_CHAN_OUTPUT_MODE_E int32
Output mode of a channel
const ( HI_UNF_DMX_CHAN_OUTPUT_MODE_PLAY HI_UNF_DMX_CHAN_OUTPUT_MODE_E = iota + 0x1 /* Mode of playing audios/videos or receiving data */ HI_UNF_DMX_CHAN_OUTPUT_MODE_REC /* Recording mode */ HI_UNF_DMX_CHAN_OUTPUT_MODE_PLAY_REC /* Mode of recording and playing data or receiving data */ HI_UNF_DMX_CHAN_OUTPUT_MODE_BUTT )
type HI_UNF_DMX_CHAN_STATUS_E ¶
type HI_UNF_DMX_CHAN_STATUS_E int32
Channel status
const ( HI_UNF_DMX_CHAN_CLOSE HI_UNF_DMX_CHAN_STATUS_E = iota + 0x0 /* The channel is stopped. */ HI_UNF_DMX_CHAN_PLAY_EN /* The channel is playing audios/videos or receiving data. */ HI_UNF_DMX_CHAN_REC_EN /* The channel is recording data. */ HI_UNF_DMX_CHAN_PLAY_REC_EN /* The channel is recording and receiving data. */ )
type HI_UNF_DMX_CHAN_STATUS_S ¶
type HI_UNF_DMX_CHAN_STATUS_S struct {
// contains filtered or unexported fields
}
Defines the channel status
type HI_UNF_DMX_CHAN_TYPE_E ¶
type HI_UNF_DMX_CHAN_TYPE_E int32
Channel type
const ( HI_UNF_DMX_CHAN_TYPE_SEC HI_UNF_DMX_CHAN_TYPE_E = iota /* Channel that receives sections data such as program specific information (PSI) or service information (SI) data */ HI_UNF_DMX_CHAN_TYPE_PES /* Channel that receives packetized elementary stream (PES) data */ HI_UNF_DMX_CHAN_TYPE_AUD /* Channel that receives audio data */ HI_UNF_DMX_CHAN_TYPE_VID /* Channel that receives video data */ HI_UNF_DMX_CHAN_TYPE_POST /* Entire-packet posting channel that receives an entire TS packet with a specific packet identifier (PID). */ HI_UNF_DMX_CHAN_TYPE_ECM_EMM /* Channel that receives entitlement control message (ECM) or entitlement management message (EMM) data */ HI_UNF_DMX_CHAN_TYPE_BUTT )
type HI_UNF_DMX_DATA_S ¶
type HI_UNF_DMX_DATA_S struct {
// contains filtered or unexported fields
}
DEMUX data packet
type HI_UNF_DMX_DATA_TYPE_E ¶
type HI_UNF_DMX_DATA_TYPE_E int32
Type of the DEMUX data packet.
const ( HI_UNF_DMX_DATA_TYPE_WHOLE HI_UNF_DMX_DATA_TYPE_E = iota /* The data segment contains a complete data packet */ HI_UNF_DMX_DATA_TYPE_HEAD /* The data segment contains the head of a data packet, but the data packet may not be complete */ HI_UNF_DMX_DATA_TYPE_BODY /* This type is valid only for the PES data.The data segment contains the body of a data packet. */ HI_UNF_DMX_DATA_TYPE_TAIL /* This type is valid only for the PES data.The data segment contains the tail of a data packet, and is used to identify the end of a data packet. */ HI_UNF_DMX_DATA_TYPE_BUTT )
type HI_UNF_DMX_FILTER_ATTR_S ¶
type HI_UNF_DMX_FILTER_ATTR_S struct {
// contains filtered or unexported fields
}
type HI_UNF_DMX_INVOKE_TYPE_E ¶
type HI_UNF_DMX_INVOKE_TYPE_E int32
const ( HI_UNF_DMX_INVOKE_TYPE_CHAN_CC_REPEAT_SET HI_UNF_DMX_INVOKE_TYPE_E = iota /* dmx set channel extra attr,param:HI_UNF_DMX_CHAN_CC_REPEAT_SET_S */ HI_UNF_DMX_INVOKE_TYPE_PUSI_SET /* dmx set PUSI flag,param:HI_UNF_DMX_PUSI_SET_S */ HI_UNF_DMX_INVOKE_TYPE_TEI_SET /* dmx set TEI flag,param:HI_UNF_DMX_TEI_SET_S */ HI_UNF_DMX_INVOKE_TYPE_TSI_ATTACH_TSO /* Attach TSI with TSO ,param:HI_UNF_DMX_TSI_ATTACH_TSO_S */ HI_UNF_DMX_INVOKE_TYPE_BUTT )
type HI_UNF_DMX_PORT_ATTR_S ¶
type HI_UNF_DMX_PORT_ATTR_S struct {
// contains filtered or unexported fields
}
TS port attributes
type HI_UNF_DMX_PORT_E ¶
type HI_UNF_DMX_PORT_E int32
TS port ID
const ( HI_UNF_DMX_PORT_IF_0 HI_UNF_DMX_PORT_E = iota /* The first IF port (port with QAM inside chipset). */ HI_UNF_DMX_PORT_IF_1 HI_UNF_DMX_PORT_IF_2 HI_UNF_DMX_PORT_IF_3 HI_UNF_DMX_PORT_IF_4 HI_UNF_DMX_PORT_IF_5 HI_UNF_DMX_PORT_IF_6 HI_UNF_DMX_PORT_IF_7 HI_UNF_DMX_PORT_IF_8 HI_UNF_DMX_PORT_IF_9 HI_UNF_DMX_PORT_IF_10 HI_UNF_DMX_PORT_IF_11 HI_UNF_DMX_PORT_IF_12 HI_UNF_DMX_PORT_IF_13 HI_UNF_DMX_PORT_IF_14 HI_UNF_DMX_PORT_IF_15 )
const ( HI_UNF_DMX_PORT_TSI_0 HI_UNF_DMX_PORT_E = iota + 0x20 /* The first TS IN port. */ HI_UNF_DMX_PORT_TSI_1 HI_UNF_DMX_PORT_TSI_2 HI_UNF_DMX_PORT_TSI_3 HI_UNF_DMX_PORT_TSI_4 HI_UNF_DMX_PORT_TSI_5 HI_UNF_DMX_PORT_TSI_6 HI_UNF_DMX_PORT_TSI_7 HI_UNF_DMX_PORT_TSI_8 HI_UNF_DMX_PORT_TSI_9 HI_UNF_DMX_PORT_TSI_10 HI_UNF_DMX_PORT_TSI_11 HI_UNF_DMX_PORT_TSI_12 HI_UNF_DMX_PORT_TSI_13 HI_UNF_DMX_PORT_TSI_14 HI_UNF_DMX_PORT_TSI_15 )
const ( HI_UNF_DMX_PORT_RAM_0 HI_UNF_DMX_PORT_E = iota + 0x80 /* The first RAM port. */ HI_UNF_DMX_PORT_RAM_1 HI_UNF_DMX_PORT_RAM_2 HI_UNF_DMX_PORT_RAM_3 HI_UNF_DMX_PORT_RAM_4 HI_UNF_DMX_PORT_RAM_5 HI_UNF_DMX_PORT_RAM_6 HI_UNF_DMX_PORT_RAM_7 HI_UNF_DMX_PORT_RAM_8 HI_UNF_DMX_PORT_RAM_9 HI_UNF_DMX_PORT_RAM_10 HI_UNF_DMX_PORT_RAM_11 HI_UNF_DMX_PORT_RAM_12 HI_UNF_DMX_PORT_RAM_13 HI_UNF_DMX_PORT_RAM_14 HI_UNF_DMX_PORT_RAM_15 HI_UNF_DMX_PORT_BUTT )
type HI_UNF_DMX_PORT_MODE_E ¶
type HI_UNF_DMX_PORT_MODE_E int32
TS port mode
const ( HI_UNF_DMX_PORT_MODE_EXTERNAL HI_UNF_DMX_PORT_MODE_E = iota /* External TS input mode */ HI_UNF_DMX_PORT_MODE_INTERNAL /* Internal TS input mode */ HI_UNF_DMX_PORT_MODE_RAM /* Memory input mode */ HI_UNF_DMX_PORT_MODE_BUTT )
type HI_UNF_DMX_PORT_PACKETNUM_S ¶
type HI_UNF_DMX_PORT_PACKETNUM_S struct {
// contains filtered or unexported fields
}
Status of the TS port
type HI_UNF_DMX_PORT_TYPE_E ¶
type HI_UNF_DMX_PORT_TYPE_E int32
TS port type
const ( HI_UNF_DMX_PORT_TYPE_PARALLEL_BURST HI_UNF_DMX_PORT_TYPE_E = iota /* Parallel burst mode */ HI_UNF_DMX_PORT_TYPE_PARALLEL_VALID /* Parallel valid mode */ HI_UNF_DMX_PORT_TYPE_PARALLEL_NOSYNC_188 /* Self-sync 188 mode */ HI_UNF_DMX_PORT_TYPE_PARALLEL_NOSYNC_204 /* Self-sync 204 mode */ HI_UNF_DMX_PORT_TYPE_PARALLEL_NOSYNC_188_204 /* self-sync 188/204 auto-identification mode */ HI_UNF_DMX_PORT_TYPE_SERIAL /* Serial sync mode, 1bit */ HI_UNF_DMX_PORT_TYPE_USER_DEFINED /* User defined mode */ HI_UNF_DMX_PORT_TYPE_SERIAL2BIT /* Serial sync mode, 2bit */ HI_UNF_DMX_PORT_TYPE_SERIAL_NOSYNC /* Serial nosync mode, 1bit */ HI_UNF_DMX_PORT_TYPE_SERIAL2BIT_NOSYNC /* Serial nosync mode, 2bit */ HI_UNF_DMX_PORT_TYPE_AUTO /* Auto mode */ HI_UNF_DMX_PORT_TYPE_BUTT )
type HI_UNF_DMX_PUSI_SET_S ¶
type HI_UNF_DMX_PUSI_SET_S struct {
// contains filtered or unexported fields
}
PUSI (Payload Unit Start Index) config structure
type HI_UNF_DMX_RECBUF_STATUS_S ¶
type HI_UNF_DMX_RECBUF_STATUS_S struct {
// contains filtered or unexported fields
}
record buffer status
type HI_UNF_DMX_REC_ATTR_S ¶
type HI_UNF_DMX_REC_ATTR_S struct {
// contains filtered or unexported fields
}
record attribute
type HI_UNF_DMX_REC_DATA_INDEX_S ¶
type HI_UNF_DMX_REC_DATA_INDEX_S struct {
// contains filtered or unexported fields
}
type HI_UNF_DMX_REC_DATA_S ¶
type HI_UNF_DMX_REC_DATA_S struct {
// contains filtered or unexported fields
}
record data
type HI_UNF_DMX_REC_INDEX_S ¶
type HI_UNF_DMX_REC_INDEX_S struct {
// contains filtered or unexported fields
}
index data
type HI_UNF_DMX_REC_INDEX_TYPE_E ¶
type HI_UNF_DMX_REC_INDEX_TYPE_E int32
*type of index
const ( HI_UNF_DMX_REC_INDEX_TYPE_NONE HI_UNF_DMX_REC_INDEX_TYPE_E = iota /* No index is created */ HI_UNF_DMX_REC_INDEX_TYPE_VIDEO /* Video index */ HI_UNF_DMX_REC_INDEX_TYPE_AUDIO /* Audio index */ HI_UNF_DMX_REC_INDEX_TYPE_BUTT )
type HI_UNF_DMX_REC_TYPE_E ¶
type HI_UNF_DMX_REC_TYPE_E int32
type of record
const ( HI_UNF_DMX_REC_TYPE_SELECT_PID HI_UNF_DMX_REC_TYPE_E = iota HI_UNF_DMX_REC_TYPE_ALL_PID HI_UNF_DMX_REC_TYPE_BUTT )
type HI_UNF_DMX_SCRAMBLED_FLAG_E ¶
type HI_UNF_DMX_SCRAMBLED_FLAG_E int32
Scrambled flag of the channel data
const ( HI_UNF_DMX_SCRAMBLED_FLAG_TS HI_UNF_DMX_SCRAMBLED_FLAG_E = iota /* TS data is scrambled */ HI_UNF_DMX_SCRAMBLED_FLAG_PES /* PES data is scrambled */ HI_UNF_DMX_SCRAMBLED_FLAG_NO /* Data is not scrambled */ HI_UNF_DMX_SCRAMBLED_FLAG_BUTT )
type HI_UNF_DMX_SECURE_MODE_E ¶
type HI_UNF_DMX_SECURE_MODE_E int32
Secure mode type
const ( HI_UNF_DMX_SECURE_MODE_NONE HI_UNF_DMX_SECURE_MODE_E = iota /* no security protection */ HI_UNF_DMX_SECURE_MODE_TEE /* trustedzone security protection */ HI_UNF_DMX_SECURE_MODE_BUTT )
type HI_UNF_DMX_TAG_ATTR_S ¶
type HI_UNF_DMX_TAG_ATTR_S struct {
// contains filtered or unexported fields
}
type HI_UNF_DMX_TAG_SYNC_MODE_E ¶
type HI_UNF_DMX_TAG_SYNC_MODE_E int32
Tag sync mode
const ( HI_UNF_DMX_TAG_HEAD_SYNC HI_UNF_DMX_TAG_SYNC_MODE_E = 0x0 /* tag sync signal at tag head */ HI_UNF_DMX_NORMAL_HEAD_SYNC = 0x1 /* tag sync signal at 47 header */ )
type HI_UNF_DMX_TEI_SET_S ¶
type HI_UNF_DMX_TEI_SET_S struct {
// contains filtered or unexported fields
}
TEI (Transport Error Index) config structure
type HI_UNF_DMX_TSBUF_STATUS_S ¶
type HI_UNF_DMX_TSBUF_STATUS_S struct {
// contains filtered or unexported fields
}
Status of a TS buffer of a DEMUX
type HI_UNF_DMX_TSI_ATTACH_TSO_S ¶
type HI_UNF_DMX_TSI_ATTACH_TSO_S struct {
// contains filtered or unexported fields
}
Define of how TSI and TSO to be attached
type HI_UNF_DMX_TSO_CLK_E ¶
type HI_UNF_DMX_TSO_CLK_E int32
TS out mode clock frequency
const ( HI_UNF_DMX_TSO_CLK_100M HI_UNF_DMX_TSO_CLK_E = iota /* TS out mode clock frequency 100M */ HI_UNF_DMX_TSO_CLK_150M /* TS out mode clock frequency 150M */ HI_UNF_DMX_TSO_CLK_1200M /* TS out mode clock frequency 1200M */ HI_UNF_DMX_TSO_CLK_1500M /* TS out mode clock frequency 1500M */ HI_UNF_DMX_TSO_CLK_BUTT )
type HI_UNF_DMX_TSO_CLK_MODE_E ¶
type HI_UNF_DMX_TSO_CLK_MODE_E int32
TSO clock mode
const ( HI_UNF_DMX_TSO_CLK_MODE_NORMAL HI_UNF_DMX_TSO_CLK_MODE_E = iota /* Normal clock: clock always active */ HI_UNF_DMX_TSO_CLK_MODE_JITTER /* Jittered clock: clock active only when outputing data */ HI_UNF_DMX_TSO_CLK_MODE_BUTT )
type HI_UNF_DMX_TSO_PORT_ATTR_S ¶
type HI_UNF_DMX_TSO_PORT_ATTR_S struct {
// contains filtered or unexported fields
}
TS out port attributes
type HI_UNF_DMX_TSO_PORT_E ¶
type HI_UNF_DMX_TSO_PORT_E int32
TSO port ID
const ( HI_UNF_DMX_PORT_TSO_0 HI_UNF_DMX_TSO_PORT_E = iota /* The first TS OUT port. */ HI_UNF_DMX_PORT_TSO_1 HI_UNF_DMX_PORT_TSO_2 HI_UNF_DMX_PORT_TSO_3 )
type HI_UNF_DMX_TSO_SERIAL_BIT_E ¶
type HI_UNF_DMX_TSO_SERIAL_BIT_E int32
TSO port signal line selector
type HI_UNF_DMX_TSO_VALID_MODE_E ¶
type HI_UNF_DMX_TSO_VALID_MODE_E int32
TSO valid mode
const ( HI_UNF_DMX_TSO_VALID_ACTIVE_OUTPUT HI_UNF_DMX_TSO_VALID_MODE_E = iota /* Valid signal high when outputing datas */ HI_UNF_DMX_TSO_VALID_ACTIVE_HIGH /* Valid signal always high */ HI_UNF_DMX_TSO_VALID_ACTIVE_BUTT )
type HI_UNF_IR_CODE_E ¶
type HI_UNF_IR_CODE_E int32
const ( HI_UNF_IR_CODE_NEC_SIMPLE HI_UNF_IR_CODE_E = iota HI_UNF_IR_CODE_TC9012 HI_UNF_IR_CODE_NEC_FULL HI_UNF_IR_CODE_SONY_12BIT HI_UNF_IR_CODE_RAW HI_UNF_IR_CODE_BUTT )
type HI_UNF_IR_PROTOCOL_E ¶
type HI_UNF_IR_PROTOCOL_E int32
const ( HI_UNF_IR_NEC HI_UNF_IR_PROTOCOL_E = 0 HI_UNF_IR_RC6A HI_UNF_IR_PROTOCOL_E = iota + 10 HI_UNF_IR_RC5 HI_UNF_IR_LOW_LATENCY_PROTOCOL HI_UNF_IR_RC6_MODE0 HI_UNF_IR_RCMM HI_UNF_IR_RUWIDO HI_UNF_IR_RCRF8 HI_UNF_IR_MULTIPLE HI_UNF_IR_RMAP HI_UNF_IR_RSTEP HI_UNF_IR_RMAP_DOUBLEBIT HI_UNF_IR_LOW_LATENCY_PRO_PROTOCOL HI_UNF_IR_XMP HI_UNF_IR_USER_DEFINED HI_UNF_IR_PROTOCOL_BUTT )
type HI_UNF_KEY_STATUS_E ¶
type HI_UNF_KEY_STATUS_E int32
Structs Definitions
const ( HI_UNF_KEY_STATUS_DOWN HI_UNF_KEY_STATUS_E = iota HI_UNF_KEY_STATUS_HOLD HI_UNF_KEY_STATUS_UP HI_UNF_KEY_STATUS_BUTT )
type HI_UNF_SCI_LEVEL_E ¶
type HI_UNF_SCI_LEVEL_E int32
* SCI Active Level *
const ( HI_UNF_SCI_LEVEL_LOW HI_UNF_SCI_LEVEL_E = iota /* Active Low */ HI_UNF_SCI_LEVEL_HIGH /* Active High */ HI_UNF_SCI_LEVEL_BUTT )
type HI_UNF_SCI_MODE_E ¶
type HI_UNF_SCI_MODE_E int32
Structs Definitions
* Output configuration of the smart card interface clock (SCICLK) pin *
const ( HI_UNF_SCI_MODE_CMOS HI_UNF_SCI_MODE_E = iota /* Complementary metal-oxide semiconductor (CMOS) output */ HI_UNF_SCI_MODE_OD /* Open drain (OD) output */ HI_UNF_SCI_MODE_BUTT )
type HI_UNF_SCI_PARAMS_S ¶
type HI_UNF_SCI_PARAMS_S struct { Port HI_UNF_SCI_PORT_E /* SCI Port ID */ Protocol HI_UNF_SCI_PROTOCOL_E /* Used Protocol Type */ ActalClkRate HI_U32 /* Actual clock rate conversion factor F */ ActalBitRate HI_U32 /* Actual bit rate conversion factor D */ Fi HI_U32 /* Clock factor returned by the answer to reset (ATR) */ Di HI_U32 /* Bit rate factor returned by the ATR */ GuardDelay HI_U32 /* Extra Guard Time N */ CharTimeouts HI_U32 /* Character timeout of T0 or T1 */ BlockTimeouts HI_U32 /* Block Timeout of T1 */ TxRetries HI_U32 /* Number of transmission retries */ }
* SCI System Parameters *
type HI_UNF_SCI_PORT_E ¶
type HI_UNF_SCI_PORT_E int32
* SCI Port *
const ( HI_UNF_SCI_PORT0 HI_UNF_SCI_PORT_E = iota /* SCI Port 0 */ HI_UNF_SCI_PORT1 /* SCI Port 1 */ HI_UNF_SCI_PORT_BUTT )
type HI_UNF_SCI_PROTOCOL_E ¶
type HI_UNF_SCI_PROTOCOL_E int32
* SCI Protocol *
const ( HI_UNF_SCI_PROTOCOL_T0 HI_UNF_SCI_PROTOCOL_E = iota /* 7816 T0 Protocol */ HI_UNF_SCI_PROTOCOL_T1 /* 7816 T1 Protocol */ HI_UNF_SCI_PROTOCOL_T14 /* 7816 T14 Protocol */ HI_UNF_SCI_PROTOCOL_BUTT )
type HI_UNF_SCI_STATUS_E ¶
type HI_UNF_SCI_STATUS_E int32
* Status of the SCI Card *
const ( HI_UNF_SCI_STATUS_UNINIT HI_UNF_SCI_STATUS_E = iota /* The SCI Card is not initialized. (Reserved status) */ HI_UNF_SCI_STATUS_FIRSTINIT /* The SCI Card is being initialized.(Reserved status) */ HI_UNF_SCI_STATUS_NOCARD /* There is no SCI Card. */ HI_UNF_SCI_STATUS_INACTIVECARD /* The SCI Card is not activated (unavailable). */ //HI_UNF_SCI_STATUS_CARDFAULT /* The SCI Card is faulty.*/ HI_UNF_SCI_STATUS_WAITATR /* The SCI Card is waiting for the ATR data. */ HI_UNF_SCI_STATUS_READATR /* The SCI Card is receiving the ATR data. */ HI_UNF_SCI_STATUS_READY /* The SCI Card is available (activated). */ HI_UNF_SCI_STATUS_RX /* The SCI Card is busy receiving data. */ HI_UNF_SCI_STATUS_TX /* The SCI Card is busy transmitting data. */ )
type HI_UNF_VCODEC_TYPE_E ¶
type HI_UNF_VCODEC_TYPE_E int32
Structs Definitions Defines the stream type supported by the decoder.
const ( HI_UNF_VCODEC_TYPE_MPEG2 HI_UNF_VCODEC_TYPE_E = iota /* MPEG2 */ HI_UNF_VCODEC_TYPE_MPEG4 /* MPEG4 DIVX4 DIVX5 */ HI_UNF_VCODEC_TYPE_AVS /* AVS */ HI_UNF_VCODEC_TYPE_H263 /* H263 */ HI_UNF_VCODEC_TYPE_H264 /* H264 */ HI_UNF_VCODEC_TYPE_REAL8 /* REAL */ HI_UNF_VCODEC_TYPE_REAL9 /* REAL */ HI_UNF_VCODEC_TYPE_VC1 /* VC-1 */ HI_UNF_VCODEC_TYPE_VP6 /* VP6 */ HI_UNF_VCODEC_TYPE_VP6F /* VP6F */ HI_UNF_VCODEC_TYPE_VP6A /* VP6A */ HI_UNF_VCODEC_TYPE_MJPEG /* MJPEG */ HI_UNF_VCODEC_TYPE_SORENSON /* SORENSON SPARK */ HI_UNF_VCODEC_TYPE_DIVX3 /* DIVX3 */ HI_UNF_VCODEC_TYPE_RAW /* RAW */ HI_UNF_VCODEC_TYPE_JPEG /* JPEG, added for VENC */ HI_UNF_VCODEC_TYPE_VP8 /* VP8 */ HI_UNF_VCODEC_TYPE_MSMPEG4V1 /* MS private MPEG4 */ HI_UNF_VCODEC_TYPE_MSMPEG4V2 HI_UNF_VCODEC_TYPE_MSVIDEO1 /* MS video */ HI_UNF_VCODEC_TYPE_WMV1 HI_UNF_VCODEC_TYPE_WMV2 HI_UNF_VCODEC_TYPE_RV10 HI_UNF_VCODEC_TYPE_RV20 HI_UNF_VCODEC_TYPE_SVQ1 /* Apple video */ HI_UNF_VCODEC_TYPE_SVQ3 /* Apple video */ HI_UNF_VCODEC_TYPE_H261 HI_UNF_VCODEC_TYPE_VP3 HI_UNF_VCODEC_TYPE_VP5 HI_UNF_VCODEC_TYPE_CINEPAK HI_UNF_VCODEC_TYPE_INDEO2 HI_UNF_VCODEC_TYPE_INDEO3 HI_UNF_VCODEC_TYPE_INDEO4 HI_UNF_VCODEC_TYPE_INDEO5 HI_UNF_VCODEC_TYPE_MJPEGB HI_UNF_VCODEC_TYPE_MVC HI_UNF_VCODEC_TYPE_HEVC HI_UNF_VCODEC_TYPE_DV HI_UNF_VCODEC_TYPE_VP9 HI_UNF_VCODEC_TYPE_BUTT )
type HI_UNF_VIDEO_FRAME_TYPE_E ¶
type HI_UNF_VIDEO_FRAME_TYPE_E int32
Defines the type of the video frame.
const ( HI_UNF_FRAME_TYPE_UNKNOWN HI_UNF_VIDEO_FRAME_TYPE_E = iota /* Unknown */ HI_UNF_FRAME_TYPE_I /* I frame */ HI_UNF_FRAME_TYPE_P /* P frame */ HI_UNF_FRAME_TYPE_B /* B frame */ HI_UNF_FRAME_TYPE_BUTT )
type HI_VIRT_ADDR_T ¶
type HI_VIRT_ADDR_T = uint32
type IOC_MODULE_CMD_E ¶
type IOC_MODULE_CMD_E = uintptr
const ( IOC_MODULE_CMD_SET_COUNT IOC_MODULE_CMD_E = iota IOC_MODULE_CMD_ADD_INFO IOC_MODULE_CMD_DEL_INFO IOC_MODULE_CMD_GET_INFO IOC_MODULE_CMD_SET_FUNC IOC_MODULE_CMD_GET_FUNC IOC_MODULE_CMD_MEM_ADD IOC_MODULE_CMD_MEM_DEL IOC_MODULE_CMD_ALLOC_ID IOC_MODULE_CMD_BUTT )
type KeyAttr ¶
type KeyAttr struct { /* upper 16bit data under key mode */ Upper uint64 /* lower 32bit data under key mode * or symbol value under symbol mode */ Lower uint64 ProtocolName [32]byte /* indentify key status. */ StatusKey HI_UNF_KEY_STATUS_E }
func HI_UNF_IR_GetValueWithProtocol ¶
************************************************************ Function: HI_UNF_IR_GetValueWithProtocol Description: get the value and status of key Calls: Data Accessed: Data Updated: NA Input: u32TimeoutMs: overtime value with unit of ms : 0 means no block while 0xFFFFFFFF means block forever Output: Return: KeyAttr
error
Others: NA ************************************************************
type MODULE_ALLOC_S ¶
type MODULE_ALLOC_S struct {
// contains filtered or unexported fields
}
Structs Definitions
type MODULE_INFO_S ¶
type MODULE_INFO_S struct {
// contains filtered or unexported fields
}
type MODULE_MEM_INFO_S ¶
type MODULE_MEM_INFO_S struct {
// contains filtered or unexported fields
}
type RMX_Add_Pump_S ¶
type RMX_Add_Pump_S struct { RmxHandle HI_HANDLE /* [in] */ Attr HI_MPI_RMX_PUMP_ATTR_S /* [in] */ PumpHandle HI_HANDLE /* [out] */ }
type RMX_Attr_S ¶
type RMX_Attr_S struct { Handle HI_HANDLE /*[in] */ Attr HI_MPI_RMX_ATTR_S /* [in/out] */ }
type RMX_Create_S ¶
type RMX_Create_S struct { Attr HI_MPI_RMX_ATTR_S /* [in] */ Handle HI_HANDLE /* [out] */ }
type RMX_Pump_Attr_S ¶
type RMX_Pump_Attr_S struct { PumpHandle HI_HANDLE /* [in] */ Attr HI_MPI_RMX_PUMP_ATTR_S /* [out] */ }
type SCI_ADD_GUARD_S ¶
type SCI_ADD_GUARD_S struct { Port HI_UNF_SCI_PORT_E AddCharGuard HI_U32 }
type SCI_ATR_COMPAT_S ¶
type SCI_ATR_COMPAT_S struct { Port HI_UNF_SCI_PORT_E AtrBuf HI_U32 AtrBufSize HI_U32 DataLen HI_U8 }
type SCI_ATR_S ¶
type SCI_ATR_S struct { Port HI_UNF_SCI_PORT_E AtrBuf *HI_U8 AtrBufSize HI_U32 DataLen HI_U8 }
type SCI_BLOCKTIMEOUT_S ¶
type SCI_BLOCKTIMEOUT_S struct { Port HI_UNF_SCI_PORT_E BlockTimeouts HI_U32 }
type SCI_CHARTIMEOUT_S ¶
type SCI_CHARTIMEOUT_S struct { Port HI_UNF_SCI_PORT_E Protocol HI_UNF_SCI_PROTOCOL_E CharTimeouts HI_U32 }
type SCI_DATA_COMPAT_S ¶
type SCI_DATA_COMPAT_S struct { Port HI_UNF_SCI_PORT_E DataBuf HI_U32 BufSize HI_U32 DataLen HI_U32 TimeoutMs HI_U32 }
type SCI_DATA_S ¶
type SCI_DATA_S struct { Port HI_UNF_SCI_PORT_E DataBuf *HI_U8 BufSize HI_U32 DataLen HI_U32 TimeoutMs HI_U32 }
type SCI_DEV_STATE_S ¶
type SCI_DEV_STATE_S struct {
// contains filtered or unexported fields
}
type SCI_EXT_BAUD_S ¶
type SCI_EXT_BAUD_S struct { Port HI_UNF_SCI_PORT_E ClkRate HI_U32 BitRate HI_U32 }
type SCI_IO_OUTPUTTYPE_S ¶
type SCI_IO_OUTPUTTYPE_S struct { Port HI_UNF_SCI_PORT_E IO SCI_IO_E OutputType HI_UNF_SCI_MODE_E }
type SCI_LEVEL_S ¶
type SCI_LEVEL_S struct { Port HI_UNF_SCI_PORT_E Level HI_UNF_SCI_LEVEL_E }
type SCI_OPEN_S ¶
type SCI_OPEN_S struct { Port HI_UNF_SCI_PORT_E Protocol HI_UNF_SCI_PROTOCOL_E Frequency HI_U32 }
type SCI_RESET_S ¶
type SCI_RESET_S struct { Port HI_UNF_SCI_PORT_E WarmReset HI_BOOL }
type SCI_STATUS_S ¶
type SCI_STATUS_S struct { Port HI_UNF_SCI_PORT_E Status HI_UNF_SCI_STATUS_E }
type SCI_TXRETRY_S ¶
type SCI_TXRETRY_S struct { Port HI_UNF_SCI_PORT_E TxRetryTimes HI_U32 }