arm

package
v0.12.0 Latest Latest
Warning

This package is not in the latest version of its module.

Go to latest
Published: Jan 30, 2020 License: BSD-3-Clause Imports: 3 Imported by: 0

Documentation

Overview

CMSIS abstraction functions.

Original copyright:

Copyright (c) 2009 - 2015 ARM LIMITED

All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
  notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
  notice, this list of conditions and the following disclaimer in the
  documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
  to endorse or promote products derived from this software without
  specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.

Index

Constants

View Source
const (
	SCS_BASE  = 0xE000E000
	SYST_BASE = SCS_BASE + 0x0010
	NVIC_BASE = SCS_BASE + 0x0100
	SCB_BASE  = SCS_BASE + 0x0D00
)
View Source
const (
	SCB_AIRCR_VECTKEY_Pos     = 16
	SCB_AIRCR_SYSRESETREQ_Pos = 2
	SCB_AIRCR_SYSRESETREQ_Msk = 1 << SCB_AIRCR_SYSRESETREQ_Pos
)
View Source
const (
	// SYST.SYST_CSR: SysTick Control and Status Register
	SYST_CSR_ENABLE_Pos    = 0x0     // Position of ENABLE field.
	SYST_CSR_ENABLE_Msk    = 0x1     // Bit mask of ENABLE field.
	SYST_CSR_ENABLE        = 0x1     // Bit ENABLE.
	SYST_CSR_TICKINT_Pos   = 0x1     // Position of TICKINT field.
	SYST_CSR_TICKINT_Msk   = 0x2     // Bit mask of TICKINT field.
	SYST_CSR_TICKINT       = 0x2     // Bit TICKINT.
	SYST_CSR_CLKSOURCE_Pos = 0x2     // Position of CLKSOURCE field.
	SYST_CSR_CLKSOURCE_Msk = 0x4     // Bit mask of CLKSOURCE field.
	SYST_CSR_CLKSOURCE     = 0x4     // Bit CLKSOURCE.
	SYST_CSR_COUNTFLAG_Pos = 0x10    // Position of COUNTFLAG field.
	SYST_CSR_COUNTFLAG_Msk = 0x10000 // Bit mask of COUNTFLAG field.
	SYST_CSR_COUNTFLAG     = 0x10000 // Bit COUNTFLAG.

	// SYST.SYST_RVR: SysTick Reload Value Register
	SYST_RVR_RELOAD_Pos = 0x0      // Position of RELOAD field.
	SYST_RVR_RELOAD_Msk = 0xffffff // Bit mask of RELOAD field.

	// SYST.SYST_CVR: SysTick Current Value Register
	SYST_CVR_CURRENT_Pos = 0x0      // Position of CURRENT field.
	SYST_CVR_CURRENT_Msk = 0xffffff // Bit mask of CURRENT field.

	// SYST.SYST_CALIB: SysTick Calibration Value Register
	SYST_CALIB_TENMS_Pos = 0x0        // Position of TENMS field.
	SYST_CALIB_TENMS_Msk = 0xffffff   // Bit mask of TENMS field.
	SYST_CALIB_SKEW_Pos  = 0x1e       // Position of SKEW field.
	SYST_CALIB_SKEW_Msk  = 0x40000000 // Bit mask of SKEW field.
	SYST_CALIB_SKEW      = 0x40000000 // Bit SKEW.
	SYST_CALIB_NOREF_Pos = 0x1f       // Position of NOREF field.
	SYST_CALIB_NOREF_Msk = 0x80000000 // Bit mask of NOREF field.
	SYST_CALIB_NOREF     = 0x80000000 // Bit NOREF.
)

Bitfields for SYST: System Timer

View Source
const (
	// Regular semihosting calls
	SemihostingClock      = 0x10
	SemihostingClose      = 0x02
	SemihostingElapsed    = 0x30
	SemihostingErrno      = 0x13
	SemihostingFileLen    = 0x0C
	SemihostingGetCmdline = 0x15
	SemihostingHeapInfo   = 0x16
	SemihostingIsError    = 0x08
	SemihostingIsTTY      = 0x09
	SemihostingOpen       = 0x01
	SemihostingRead       = 0x06
	SemihostingReadByte   = 0x07
	SemihostingRemove     = 0x0E
	SemihostingRename     = 0x0F
	SemihostingSeek       = 0x0A
	SemihostingSystem     = 0x12
	SemihostingTickFreq   = 0x31
	SemihostingTime       = 0x11
	SemihostingTmpName    = 0x0D
	SemihostingWrite      = 0x05
	SemihostingWrite0     = 0x04
	SemihostingWriteByte  = 0x03

	// Angel semihosting calls
	SemihostingEnterSVC        = 0x17
	SemihostingReportException = 0x18
)

Semihosting commands. http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/Bgbjhiea.html

View Source
const (
	// Hardware vector reason codes
	SemihostingBranchThroughZero = 20000
	SemihostingUndefinedInstr    = 20001
	SemihostingSoftwareInterrupt = 20002
	SemihostingPrefetchAbort     = 20003
	SemihostingDataAbort         = 20004
	SemihostingAddressException  = 20005
	SemihostingIRQ               = 20006
	SemihostingFIQ               = 20007

	// Software reason codes
	SemihostingBreakPoint          = 20020
	SemihostingWatchPoint          = 20021
	SemihostingStepComplete        = 20022
	SemihostingRunTimeErrorUnknown = 20023
	SemihostingInternalError       = 20024
	SemihostingUserInterruption    = 20025
	SemihostingApplicationExit     = 20026
	SemihostingStackOverflow       = 20027
	SemihostingDivisionByZero      = 20028
	SemihostingOSSpecific          = 20029
)

Special codes for the Angel Semihosting interface.

Variables

Functions

func Asm

func Asm(asm string)

Run the given assembly code. The code will be marked as having side effects, as it doesn't produce output and thus would normally be eliminated by the optimizer.

func AsmFull

func AsmFull(asm string, regs map[string]interface{})

Run the given inline assembly. The code will be marked as having side effects, as it would otherwise be optimized away. The inline assembly string recognizes template values in the form {name}, like so:

arm.AsmFull(
    "str {value}, {result}",
    map[string]interface{}{
        "value":  1
        "result": &dest,
    })

func DisableInterrupts added in v0.3.0

func DisableInterrupts() uintptr

DisableInterrupts disables all interrupts, and returns the old state.

TODO: it doesn't actually return the old state, meaning that it cannot be nested.

func EnableIRQ

func EnableIRQ(irq uint32)

Enable the given interrupt number.

func EnableInterrupts added in v0.3.0

func EnableInterrupts(mask uintptr)

EnableInterrupts enables all interrupts again. The value passed in must be the mask returned by DisableInterrupts.

TODO: it doesn't actually use the old state, meaning that it cannot be nested.

func ReadRegister

func ReadRegister(name string) uintptr

ReadRegister returns the contents of the specified register. The register must be a processor register, reachable with the "mov" instruction.

func SVCall0

func SVCall0(num uintptr) uintptr

Run the following system call (SVCall) with 0 arguments.

func SVCall1

func SVCall1(num uintptr, a1 interface{}) uintptr

Run the following system call (SVCall) with 1 argument.

func SVCall2

func SVCall2(num uintptr, a1, a2 interface{}) uintptr

Run the following system call (SVCall) with 2 arguments.

func SVCall3

func SVCall3(num uintptr, a1, a2, a3 interface{}) uintptr

Run the following system call (SVCall) with 3 arguments.

func SVCall4

func SVCall4(num uintptr, a1, a2, a3, a4 interface{}) uintptr

Run the following system call (SVCall) with 4 arguments.

func SemihostingCall

func SemihostingCall(num int, arg uintptr) int

Call a semihosting function. TODO: implement it here using inline assembly.

func SetPriority

func SetPriority(irq uint32, priority uint32)

Set the priority of the given interrupt number. Note that the priority is given as a 0-255 number, where some of the lower bits are not implemented by the hardware. For example, to set a low interrupt priority, use 0xc0, which is equivalent to using priority level 5 when the hardware has 8 priority levels. Also note that the priority level is inverted in ARM: a lower number means it is a more important interrupt and will interrupt ISRs with a higher interrupt priority.

func SetupSystemTimer added in v0.10.0

func SetupSystemTimer(cyclecount uint32) error

Set up the system timer to generate periodic tick events. This will cause SysTick_Handler to fire once per tick. The cyclecount parameter is a counter value which can range from 0 to 0xffffff. A value of 0 disables the timer.

func SystemReset added in v0.8.0

func SystemReset()

SystemReset performs a hard system reset.

Types

type NVIC_Type

type NVIC_Type struct {
	ISER [8]volatile.Register32 // Interrupt Set-enable Registers

	ICER [8]volatile.Register32 // Interrupt Clear-enable Registers

	ISPR [8]volatile.Register32 // Interrupt Set-pending Registers

	ICPR [8]volatile.Register32 // Interrupt Clear-pending Registers

	IABR [8]volatile.Register32 // Interrupt Active Bit Registers

	IPR [60]volatile.Register32 // Interrupt Priority Registers
	// contains filtered or unexported fields
}

Nested Vectored Interrupt Controller (NVIC).

Source: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0553a/CIHIGCIF.html

type SCB_Type added in v0.8.0

type SCB_Type struct {
	CPUID volatile.Register32 // CPUID Base Register
	ICSR  volatile.Register32 // Interrupt Control and State Register
	VTOR  volatile.Register32 // Vector Table Offset Register
	AIRCR volatile.Register32 // Application Interrupt and Reset Control Register
	SCR   volatile.Register32 // System Control Register
	CCR   volatile.Register32 // Configuration Control Register

	SHP   [2]volatile.Register32 // System Handlers Priority Registers. [0] is RESERVED
	SHCSR volatile.Register32    // System Handler Control and State Register
	// contains filtered or unexported fields
}

System Control Block (SCB)

SCB_Type provides the definitions for the System Control Block Registers.

type SYST_Type added in v0.10.0

type SYST_Type struct {
	SYST_CSR   volatile.Register32
	SYST_RVR   volatile.Register32
	SYST_CVR   volatile.Register32
	SYST_CALIB volatile.Register32
}

System Timer (SYST)

Source: https://static.docs.arm.com/ddi0403/e/DDI0403E_d_armv7m_arm.pdf B3.3

Jump to

Keyboard shortcuts

? : This menu
/ : Search site
f or F : Jump to
y or Y : Canonical URL