vemu

command module
Version: v0.1.1 Latest Latest
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Published: Oct 14, 2020 License: MIT Imports: 7 Imported by: 0

README

VEmu

RISC-V ISA emulator

ISA Support

  • User-level workloads
    • Basic syscalls: exit, write (to stdout only)
  • RV32IC
  • RV64I

Feature Roadmap

The project goal is to support simulation fast-forwarding for a BOOM Core software simulator. The final emulator will have to support at least the same ISA features as that core.

  • RV64GC
    • RV64IC
    • RV64IM
    • RV64IF
    • RV64ID
    • RV64IA
  • Hardware interrupts for GPU co-simulation

Compiling RISC-V Binaries

RISC-V cross compilation requires an installation of the riscv-gnu-toolchain. Some Linux package managers carry these tools by default. Our Testing Docker container also supports compilation.

Compile RISC-V ISA Tests and Benchmarks
cd test/
make
Compiling RV32I Custom Binaries

Run the following command with the paths to target source to compile binaries for the emualtor. Set the -march and -mabi flags for the desired ISA extensions. For example, compile an RV32I binary with flags, -march=rv32i -mabi=ilp32.

riscv64-unknown-elf-gcc \
-march=rv64i \
-mabi=lp64 -static \
-mcmodel=medany \
-fvisibility=hidden \
-nostdlib \
-nostartfiles \
-ffreestanding \
-I./src \
-I./riscv-tests/env \
-T./riscv-tests/env/p/link.ld \
src/syscalls.c \
src/crt.S \
<src files>

Emulate and Debug with Spike

The testing scripts in this repository are old and may not work.

Use test/run_debug.sh.

GDB Init

Add the following text to ~/.gdbinit to create a qemu-gdb log.

set pagination off
set logging file gdb.txt
set logging overwrite on
set logging redirect on
set logging on
set style enabled off
define logrun
    while 1 
    i r
    si
    end
end

To capture all register states up to running main, enter the following into GDB manually. GDB resources read that this should be able to run in a GDB init script, but I was not able to configure the RISC-V GDB to do so.

while $pc != 0x10480
i r
si
end

Documentation

The Go Gopher

There is no documentation for this package.

Source Files

Directories

Path Synopsis
Package bits provides functions for common bit operations
Package bits provides functions for common bit operations
Package decoder provides RISC-V instruction decoding methods.
Package decoder provides RISC-V instruction decoding methods.
Package exec updates the emulator state for the given instruction.
Package exec updates the emulator state for the given instruction.
Package fetch contains objects for instruction fetching from the icache.
Package fetch contains objects for instruction fetching from the icache.
Package memory holds an interface for main memory emulation, similar to akita.mem.Storage TODO: TEMPORARY PACKAGE.
Package memory holds an interface for main memory emulation, similar to akita.mem.Storage TODO: TEMPORARY PACKAGE.
Package protocol defines the communication between components.
Package protocol defines the communication between components.
Package regcomp contains utilites for comparing register files states
Package regcomp contains utilites for comparing register files states
Package regfile contains models for register files
Package regfile contains models for register files
Package riscv contains enumerations in the RISC-V specification.
Package riscv contains enumerations in the RISC-V specification.
Package vemulator provides objects for bulding a RISC-V emulator.
Package vemulator provides objects for bulding a RISC-V emulator.

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